Searched refs:nlm_read_reg (Results 1 – 18 of 18) sorted by relevance
| /Linux-v5.10/arch/mips/include/asm/netlogic/xlr/ |
| D | pic.h | 227 reg = nlm_read_reg(base, PIC_IRT_1(irt)); in nlm_pic_enable_irt()
236 reg = nlm_read_reg(base, PIC_IRT_1(irt)); in nlm_pic_disable_irt()
271 up1 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); in nlm_pic_read_timer()
272 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer()
273 up2 = nlm_read_reg(base, PIC_TIMER_COUNT_1(timer)); in nlm_pic_read_timer()
276 low = nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer()
284 return nlm_read_reg(base, PIC_TIMER_COUNT_0(timer)); in nlm_pic_read_timer32()
291 uint64_t pic_ctrl = nlm_read_reg(base, PIC_CTRL); in nlm_pic_set_timer()
|
| /Linux-v5.10/arch/mips/pci/ |
| D | msi-xlp.c | 253 val = nlm_read_reg(lnkbase, PCIE_9XX_INT_EN0); in xlp_config_link_msi()
259 val = nlm_read_reg(lnkbase, PCIE_INT_EN0); in xlp_config_link_msi()
266 val = nlm_read_reg(lnkbase, 0x1); /* CMD */ in xlp_config_link_msi()
283 val = nlm_read_reg(lnkbase, PCIE_BRIDGE_MSI_CAP); in xlp_config_link_msi()
350 val = nlm_read_reg(lnkbase, 0x2C); in xlp_config_link_msix()
357 val = nlm_read_reg(lnkbase, PCIE_9XX_INT_EN0); in xlp_config_link_msix()
363 val = nlm_read_reg(lnkbase, PCIE_INT_EN0); in xlp_config_link_msix()
370 val = nlm_read_reg(lnkbase, 0x1); /* CMD */ in xlp_config_link_msix()
525 status = nlm_read_reg(md->lnkbase, PCIE_9XX_MSI_STATUS) & in nlm_dispatch_msi()
528 status = nlm_read_reg(md->lnkbase, PCIE_MSI_STATUS) & in nlm_dispatch_msi()
[all …]
|
| D | pci-xlr.c | 273 nlm_read_reg(pcibase, (0x140 >> 2)); in xlr_pci_ack()
|
| /Linux-v5.10/arch/mips/netlogic/xlr/ |
| D | platform-flash.c | 147 base = nlm_read_reg(flash_mmio, FLASH_CSBASE_ADDR(cs)); in setup_flash_resource()
148 mask = nlm_read_reg(flash_mmio, FLASH_CSADDR_MASK(cs)); in setup_flash_resource()
161 flash_bar = nlm_read_reg(nlm_io_base, BRIDGE_FLASH_BAR); in xlr_flash_init()
168 gpio_resetcfg = nlm_read_reg(gpio_mmio, GPIO_PWRON_RESET_CFG_REG); in xlr_flash_init()
|
| D | platform.c | 33 value = nlm_read_reg(uartbase, offset); in nlm_xlr_uart_in()
167 val = nlm_read_reg(gpio_mmio, 21); in xls_platform_usb_init()
|
| /Linux-v5.10/arch/mips/include/asm/netlogic/ |
| D | haldefs.h | 46 nlm_read_reg(uint64_t base, uint32_t reg) in nlm_read_reg() function
131 return nlm_read_reg(base, reg); in nlm_read_reg_xkphys()
|
| /Linux-v5.10/arch/mips/netlogic/xlp/ |
| D | wakeup.c | 126 if (nlm_read_reg(syspcibase, 0) == 0xffffffff) in xlp_enable_secondary_cores()
137 fusemask = nlm_read_reg(fusebase, FUSE_9XX_DEVCFG6); in xlp_enable_secondary_cores()
|
| D | usb-init.c | 63 #define nlm_read_usb_reg(b, r) nlm_read_reg(b, r)
|
| D | ahci-init.c | 87 #define nlm_read_sata_reg(b, r) nlm_read_reg(b, r)
|
| D | usb-init-xlp2.c | 84 #define nlm_read_usb_reg(b, r) nlm_read_reg(b, r)
|
| D | nlm_hal.c | 188 val = nlm_read_reg(pcibase, XLP_PCI_IRTINFO_REG); in xlp_irq_to_irt()
|
| D | ahci-init-xlp2.c | 143 #define nlm_read_sata_reg(b, r) nlm_read_reg(b, r)
|
| /Linux-v5.10/arch/mips/netlogic/common/ |
| D | earlycons.c | 60 while ((nlm_read_reg(uartbase, UART_LSR) & UART_LSR_THRE) == 0) in prom_putchar()
|
| /Linux-v5.10/arch/mips/include/asm/netlogic/xlp-hal/ |
| D | pcibus.h | 99 #define nlm_read_pcie_reg(b, r) nlm_read_reg(b, r)
|
| D | bridge.h | 178 #define nlm_read_bridge_reg(b, r) nlm_read_reg(b, r)
|
| D | uart.h | 94 #define nlm_read_uart_reg(b, r) nlm_read_reg(b, r)
|
| D | sys.h | 194 #define nlm_read_sys_reg(b, r) nlm_read_reg(b, r)
|
| D | iomap.h | 200 #define nlm_read_pci_reg(b, r) nlm_read_reg(b, r)
|
