Searched refs:mp1_state (Results 1 – 13 of 13) sorted by relevance
286 int (*set_mp1_state)(void *handle, enum pp_mp1_state mp1_state);
2710 r = amdgpu_dpm_set_mp1_state(adev, adev->mp1_state); in amdgpu_device_ip_suspend_phase2()2713 adev->mp1_state, r); in amdgpu_device_ip_suspend_phase2()4404 adev->mp1_state = PP_MP1_STATE_SHUTDOWN; in amdgpu_device_lock_adev()4407 adev->mp1_state = PP_MP1_STATE_RESET; in amdgpu_device_lock_adev()4410 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_lock_adev()4420 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_device_unlock_adev()
1242 adev->mp1_state = PP_MP1_STATE_UNLOAD; in amdgpu_pci_shutdown()1244 adev->mp1_state = PP_MP1_STATE_NONE; in amdgpu_pci_shutdown()
962 enum pp_mp1_state mp1_state; member
536 enum pp_mp1_state mp1_state);
361 int (*set_mp1_state)(struct pp_hwmgr *hwmgr, enum pp_mp1_state mp1_state);
790 enum pp_mp1_state mp1_state);
1059 enum pp_mp1_state mp1_state) in amdgpu_dpm_set_mp1_state() argument1064 ret = smu_set_mp1_state(&adev->smu, mp1_state); in amdgpu_dpm_set_mp1_state()1069 mp1_state); in amdgpu_dpm_set_mp1_state()
942 static int pp_dpm_set_mp1_state(void *handle, enum pp_mp1_state mp1_state) in pp_dpm_set_mp1_state() argument953 return hwmgr->hwmgr_func->set_mp1_state(hwmgr, mp1_state); in pp_dpm_set_mp1_state()
1733 enum pp_mp1_state mp1_state) in smu_set_mp1_state() argument1743 switch (mp1_state) { in smu_set_mp1_state()
2716 enum pp_mp1_state mp1_state) in vega12_set_mp1_state() argument2721 switch (mp1_state) { in vega12_set_mp1_state()
3132 enum pp_mp1_state mp1_state) in vega20_set_mp1_state() argument3137 switch (mp1_state) { in vega20_set_mp1_state()
5304 enum pp_mp1_state mp1_state) in vega10_set_mp1_state() argument5309 switch (mp1_state) { in vega10_set_mp1_state()
