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Searched refs:misses (Results 1 – 25 of 57) sorted by relevance

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/Linux-v5.10/drivers/cpuidle/governors/
Dteo.c91 unsigned int misses; member
179 unsigned int misses = cpu_data->states[idx_timer].misses; in teo_update() local
182 misses -= misses >> DECAY_SHIFT; in teo_update()
185 misses += PULSE; in teo_update()
192 cpu_data->states[idx_timer].misses = misses; in teo_update()
246 unsigned int hits, misses, early_hits; in teo_select() local
261 misses = 0; in teo_select()
288 misses = cpu_data->states[i].misses; in teo_select()
326 misses = cpu_data->states[i].misses; in teo_select()
337 misses = cpu_data->states[i].misses; in teo_select()
[all …]
/Linux-v5.10/arch/powerpc/perf/
Dpower8-pmu.c128 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
130 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);
133 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);
137 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
138 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);
142 CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS);
145 CACHE_EVENT_ATTR(LLC-store-misses, PM_L2_ST_MISS);
148 CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL);
150 CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS);
151 CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS);
Dpower10-pmu.c111 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
113 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);
117 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1);
120 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
121 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);
124 CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS);
126 CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL);
128 CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS);
129 CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS);
Dpower9-pmu.c159 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED_CMPL);
161 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1_FIN);
165 CACHE_EVENT_ATTR(L1-dcache-load-misses, PM_LD_MISS_L1_FIN);
168 CACHE_EVENT_ATTR(L1-dcache-store-misses, PM_ST_MISS_L1);
169 CACHE_EVENT_ATTR(L1-icache-load-misses, PM_L1_ICACHE_MISS);
172 CACHE_EVENT_ATTR(LLC-load-misses, PM_DATA_FROM_L3MISS);
175 CACHE_EVENT_ATTR(branch-load-misses, PM_BR_MPRED_CMPL);
177 CACHE_EVENT_ATTR(dTLB-load-misses, PM_DTLB_MISS);
178 CACHE_EVENT_ATTR(iTLB-load-misses, PM_ITLB_MISS);
Dpower7-pmu.c382 GENERIC_EVENT_ATTR(cache-misses, PM_LD_MISS_L1);
384 GENERIC_EVENT_ATTR(branch-misses, PM_BR_MPRED);
/Linux-v5.10/tools/perf/tests/attr/
Dtest-record-group-sampling3 args = --no-bpf-event -e '{cycles,cache-misses}:S' kill >/dev/null 2>&1
17 # cache-misses
/Linux-v5.10/Documentation/devicetree/bindings/perf/
Dnds32v3-pmu.txt3 NDS32 core have a PMU for counting cpu and cache events like cache misses.
/Linux-v5.10/Documentation/devicetree/bindings/arc/
Darchs-pct.txt4 CPU and cache events like cache misses and hits. Like conventional PCT there
Dpct.txt4 CPU and cache events like cache misses and hits. Like conventional PCT there
/Linux-v5.10/tools/perf/util/
Dparse-events.l333 cache-misses { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_CACHE_MISSES); }
335 branch-misses { return sym(yyscanner, PERF_TYPE_HARDWARE, PERF_COUNT_HW_BRANCH_MISSES); }
377 misses|miss { return str(yyscanner, PE_NAME_CACHE_OP_RESULT); }
/Linux-v5.10/Documentation/ABI/testing/
Dsysfs-bus-event_source-devices-events2 /sys/devices/cpu/events/branch-misses
4 /sys/devices/cpu/events/cache-misses
/Linux-v5.10/drivers/video/fbdev/riva/
Driva_hw.c249 int misses; in nv3_iterate() local
334 if (last==cur) misses = 0; in nv3_iterate()
335 else if (ainfo->first_vacc) misses = vmisses; in nv3_iterate()
336 else misses = 1; in nv3_iterate()
344 …ns = 1000000*(misses*state->mem_page_miss + ainfo->vburst_size)/(state->memory_width/8)/state->mcl… in nv3_iterate()
350 if (last==cur) misses = 0; in nv3_iterate()
351 else if (ainfo->first_gacc) misses = gmisses; in nv3_iterate()
352 else misses = 1; in nv3_iterate()
360 …ns = 1000000*(misses*state->mem_page_miss + ainfo->gburst_size/(state->memory_width/8))/state->mcl… in nv3_iterate()
366 if (last==cur) misses = 0; in nv3_iterate()
[all …]
/Linux-v5.10/lib/
Dlru_cache.c203 lc->misses = 0; in lc_reset()
240 lc->hits, lc->misses, lc->starving, lc->locked, lc->changed); in lc_seq_printf_stats()
399 ++lc->misses; in __lc_get()
/Linux-v5.10/drivers/md/
Ddm-cache-policy-smq.c517 unsigned misses; member
530 s->misses = 0u; in stats_init()
535 s->hits = s->misses = 0u; in stats_reset()
543 s->misses++; in stats_level_accessed()
548 s->misses++; in stats_miss()
559 unsigned confidence = safe_div(s->hits << FP_SHIFT, s->hits + s->misses); in stats_assess()
1032 unsigned misses = mq->cache_stats.misses; in default_promote_level() local
1033 unsigned index = safe_div(hits << 4u, hits + misses); in default_promote_level()
/Linux-v5.10/include/linux/
Dlru_cache.h196 unsigned long hits, misses, starving, locked, changed; member
/Linux-v5.10/security/selinux/include/
Davc.h38 unsigned int misses; member
/Linux-v5.10/drivers/net/ethernet/myricom/
DKconfig43 is used, with the intent of lessening the impact of cache misses.
/Linux-v5.10/Documentation/virt/
Dguest-halt-polling.rst60 be increased from 10000, to avoid misses during the initial
/Linux-v5.10/Documentation/admin-guide/device-mapper/
Dcache.rst240 <#read hits> <#read misses> <#write hits> <#write misses>
257 #read misses Number of times a READ bio has been mapped
261 #write misses Number of times a WRITE bio has been
/Linux-v5.10/Documentation/staging/
Dstatic-keys.rst307 5,569,188 branch-misses # 2.67% of all branches ( +- 0.54% )
324 4,884,119 branch-misses # 2.36% of all branches ( +- 0.85% )
329 'branch-misses'. This is where we would expect to get the most savings, since
/Linux-v5.10/tools/perf/Documentation/
Ditrace.txt2 b synthesize branches events (branch misses for Arm SPE)
/Linux-v5.10/Documentation/admin-guide/
Dbcache.rst367 - Traffic's still going to the spindle/still getting cache misses
385 - Still getting cache misses, of the same data
388 the way cache coherency is handled for cache misses. If a btree node is full,
499 Hits and misses are counted per individual IO as bcache sees them; a
503 Hits and misses for IO that is intended to skip the cache are still counted,
509 since the synchronization for cache misses was rewritten)
/Linux-v5.10/Documentation/hwmon/
Dlm63.rst51 capabilities added. It misses some of the LM86 features though:
/Linux-v5.10/Documentation/arm64/
Damu.rst35 misses in the last level cache within the clock domain.
/Linux-v5.10/kernel/rcu/
DKconfig146 implementations of RCU, and allows trading off cache misses
153 number of cache misses incurred during RCU's grace-period

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