Searched refs:min_dcfclk (Results 1 – 6 of 6) sorted by relevance
121 clk_mgr->base.bw_params->wm_table.nv_entries[WM_A].pmfw_breakdown.min_dcfclk = 0; in dcn3_build_wm_range_table()143 clk_mgr->base.bw_params->wm_table.nv_entries[WM_C].pmfw_breakdown.min_dcfclk = 0; in dcn3_build_wm_range_table()358 …M_DCEFCLK][i].MinClock = clk_mgr->base.bw_params->wm_table.nv_entries[i].pmfw_breakdown.min_dcfclk; in dcn3_notify_wm_ranges()
107 uint16_t min_dcfclk; member
118 double min_dcfclk; member
3487 int min_dcfclk = 0; local3495 min_dcfclk = dc->bb_overrides.min_dcfclk_mhz;3498 min_dcfclk = 310;3502 min_dcfclk = 506;3513 calculated_states[i].fabricclk_mhz = (min_fclk_required_by_uclk < min_dcfclk) ?3514 min_dcfclk : min_fclk_required_by_uclk;
181 .min_dcfclk = 500.0, /* TODO: set this to actual min DCFCLK */2217 if (context->bw_ctx.dml.soc.min_dcfclk > dcfclk) in dcn30_calculate_wm_and_dlg()2218 dcfclk = context->bw_ctx.dml.soc.min_dcfclk; in dcn30_calculate_wm_and_dlg()
4825 if (v->DCFCLKState[i][j] < mode_lib->soc.min_dcfclk) { in dml30_ModeSupportAndSystemConfigurationFull()4826 v->DCFCLKState[i][j] = mode_lib->soc.min_dcfclk; in dml30_ModeSupportAndSystemConfigurationFull()
