Searched refs:mg_pll_div0 (Results 1 – 4 of 4) sorted by relevance
204 u32 mg_pll_div0; member
3289 pll_state->mg_pll_div0 = DKL_PLL_DIV0_INTEG_COEFF(int_coeff) | in icl_calc_mg_pll_state()3310 pll_state->mg_pll_div0 = in icl_calc_mg_pll_state()3389 m1 = pll_state->mg_pll_div0 & DKL_PLL_DIV0_FBPREDIV_MASK; in icl_ddi_mg_pll_get_freq()3391 m2_int = pll_state->mg_pll_div0 & DKL_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()3402 m2_int = pll_state->mg_pll_div0 & MG_PLL_DIV0_FBDIV_INT_MASK; in icl_ddi_mg_pll_get_freq()3404 if (pll_state->mg_pll_div0 & MG_PLL_DIV0_FRACNEN_H) { in icl_ddi_mg_pll_get_freq()3405 m2_frac = pll_state->mg_pll_div0 & in icl_ddi_mg_pll_get_freq()3702 hw_state->mg_pll_div0 = intel_de_read(dev_priv, MG_PLL_DIV0(tc_port)); in mg_pll_get_hw_state()3773 hw_state->mg_pll_div0 = intel_de_read(dev_priv, DKL_PLL_DIV0(tc_port)); in dkl_pll_get_hw_state()3774 hw_state->mg_pll_div0 &= (DKL_PLL_DIV0_INTEG_COEFF_MASK | in dkl_pll_get_hw_state()[all …]
951 pll->state.hw_state.mg_pll_div0); in i915_shared_dplls_info()
14013 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_div0); in intel_pipe_config_compare()
