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/Linux-v5.10/drivers/staging/media/omap4iss/
Diss_csiphy.c36 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
38 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
44 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
45 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
123 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
175 if (lanes->data[i].pos == 0) in omap4iss_csiphy_config()
178 if (lanes->data[i].pol > 1 || in omap4iss_csiphy_config()
179 lanes->data[i].pos > (csi2->phy->max_data_lanes + 1)) in omap4iss_csiphy_config()
182 if (used_lanes & (1 << lanes->data[i].pos)) in omap4iss_csiphy_config()
[all …]
/Linux-v5.10/drivers/gpu/drm/tegra/
Ddp.c51 link->lanes = 0; in drm_dp_link_reset()
233 link->lanes = link->max_lanes; in drm_dp_link_probe()
346 values[1] = link->lanes; in drm_dp_link_configure()
394 static const unsigned int lanes[3] = { 1, 2, 4 }; in drm_dp_link_choose() local
402 for (i = 0; i < ARRAY_SIZE(lanes) && lanes[i] <= link->max_lanes; i++) { in drm_dp_link_choose()
412 capacity = lanes[i] * (rates[j] * 10) * 8 / 10; in drm_dp_link_choose()
416 lanes[i], rates[j], requirement, in drm_dp_link_choose()
418 link->lanes = lanes[i]; in drm_dp_link_choose()
469 unsigned int lanes = link->lanes, *vs, *pe, *pc, i; in drm_dp_link_apply_training() local
485 for (i = 0; i < lanes; i++) in drm_dp_link_apply_training()
[all …]
/Linux-v5.10/drivers/media/platform/omap3isp/
Dispcsiphy.c166 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
174 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
177 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
186 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
189 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
192 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
195 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
198 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
244 reg |= (lanes->data[i].pol << in omap3isp_csiphy_config()
246 reg |= (lanes->data[i].pos << in omap3isp_csiphy_config()
[all …]
/Linux-v5.10/drivers/gpu/drm/bridge/adv7511/
Dadv7533.c43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
106 int lanes, ret; in adv7533_mode_set() local
112 lanes = 4; in adv7533_mode_set()
114 lanes = 3; in adv7533_mode_set()
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
165 dsi->lanes = adv->num_dsi_lanes; in adv7533_attach_dsi()
/Linux-v5.10/arch/arm64/boot/dts/renesas/
Dr8a774c0-ek874-mipi-2.1.dts37 clock-lanes = <0>;
38 data-lanes = <1 2>;
51 clock-lanes = <0>;
52 data-lanes = <1 2>;
61 clock-lanes = <0>;
62 data-lanes = <1 2>;
/Linux-v5.10/drivers/video/fbdev/omap2/omapfb/dss/
Dhdmi_common.c20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.10/drivers/gpu/drm/omapdrm/dss/
Dhdmi_common.c20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dphy-cadence-sierra.txt22 the clock to the lanes. "phy_clk" is deprecated.
29 Each group of PHY lanes with a single master lane should be represented as
42 - cdns,num-lanes: Number of lanes in this group. From 1 to 4. The
43 group is made up of consecutive lanes.
45 configuration of lanes.
60 cdns,num-lanes = <2>;
67 cdns,num-lanes = <1>;
Dnvidia,tegra124-xusb-padctl.txt4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
80 the pad and any of its lanes, this property must be set to "okay".
127 Each pad node has a child named "lanes" that contains one or more children of
128 its own, each representing one of the lanes controlled by the pad.
283 lanes {
[all …]
/Linux-v5.10/tools/testing/selftests/net/
Ddevlink_port_split.py83 lanes = values['lanes']
85 lanes = 0
86 return lanes
146 def exists_and_lanes(ports, lanes, dev): argument
158 if max_lanes != lanes:
160 % (port, lanes, max_lanes))
200 def split_splittable_port(port, k, lanes, dev): argument
215 test(exists_and_lanes(new_split_group, lanes/k, dev),
/Linux-v5.10/drivers/nubus/
Dproc.c73 int lanes = board->lanes; in nubus_proc_add_rsrc_dir() local
78 return proc_mkdir_data(name, 0555, procdir, (void *)lanes); in nubus_proc_add_rsrc_dir()
120 int lanes = (int)proc_get_parent_data(inode); in nubus_proc_rsrc_show() local
123 if (!lanes) in nubus_proc_rsrc_show()
126 ent.mask = lanes; in nubus_proc_rsrc_show()
/Linux-v5.10/drivers/net/ethernet/netronome/nfp/
Dnfp_devlink.c40 nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) in nfp_devlink_set_lanes() argument
49 ret = __nfp_eth_set_split(nsp, lanes); in nfp_devlink_set_lanes()
70 unsigned int lanes; in nfp_devlink_port_split() local
87 lanes = eth_port.port_lanes / count; in nfp_devlink_port_split()
88 if (eth_port.lanes == 10 && count == 2) in nfp_devlink_port_split()
89 lanes = 8 / count; in nfp_devlink_port_split()
91 ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); in nfp_devlink_port_split()
104 unsigned int lanes; in nfp_devlink_port_unsplit() local
121 lanes = eth_port.port_lanes; in nfp_devlink_port_unsplit()
123 lanes = 10; in nfp_devlink_port_unsplit()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/marvell/
Dcn9132-db.dts67 * lanes not being connected. Prevent the port for being
108 /* Generic PHY, providing serdes lanes */
156 num-lanes = <2>;
158 /* Generic PHY, providing serdes lanes */
166 num-lanes = <1>;
168 /* Generic PHY, providing serdes lanes */
177 /* Generic PHY, providing serdes lanes */
219 /* Generic PHY, providing serdes lanes */
Dcn9131-db.dts49 * lanes not being connected. Prevent the port for being
90 /* Generic PHY, providing serdes lanes */
115 num-lanes = <2>;
119 /* Generic PHY, providing serdes lanes */
129 /* Generic PHY, providing serdes lanes */
199 /* Generic PHY, providing serdes lanes */
/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dnvidia,tegra20-pcie.txt104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
148 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
150 - Root port 0 uses 4 lanes, root port 1 is unused.
151 - Both root ports use 2 lanes.
157 number of lanes in the nvidia,num-lanes property. Entries are of the form
158 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
210 nvidia,num-lanes = <2>;
224 nvidia,num-lanes = <2>;
316 nvidia,num-lanes = <2>;
[all …]
/Linux-v5.10/drivers/gpu/drm/rockchip/
Dcdn-dp-core.c148 u8 lanes; in cdn_dp_get_port_lanes() local
155 lanes = 2; in cdn_dp_get_port_lanes()
157 lanes = 4; in cdn_dp_get_port_lanes()
159 lanes = 0; in cdn_dp_get_port_lanes()
162 return lanes; in cdn_dp_get_port_lanes()
182 int i, lanes; in cdn_dp_connected_port() local
186 lanes = cdn_dp_get_port_lanes(port); in cdn_dp_connected_port()
187 if (lanes) in cdn_dp_connected_port()
284 u8 lanes, bpc; in cdn_dp_connector_mode_valid() local
304 source_max = dp->lanes; in cdn_dp_connector_mode_valid()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/media/i2c/
Dadv748x.txt52 endpoint. Each of those endpoints shall contain the data-lanes property as
56 - data-lanes: an array of physical data lane indexes
58 sources are described. For TXA 1, 2 or 4 data lanes can be described
101 clock-lanes = <0>;
102 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1>;
Dov2680.txt22 - clock-lanes: should be set to <0> (clock lane on hardware lane 0).
23 - data-lanes: should be set to <1> (one CSI-2 lane supported).
41 clock-lanes = <0>;
42 data-lanes = <1>;
Dtc358743.txt16 - data-lanes: should be <1 2 3 4> for four-lane operation,
18 - clock-lanes: should be <0>
42 data-lanes = <1 2 3 4>;
43 clock-lanes = <0>;
/Linux-v5.10/arch/arm/boot/dts/
Domap3-n9.dts30 clock-lanes = <0>;
31 data-lanes = <1 2>;
53 clock-lanes = <2>;
54 data-lanes = <1 3>;
/Linux-v5.10/drivers/media/platform/rcar-vin/
Drcar-csi2.c376 unsigned short lanes; member
416 unsigned int lanes) in rcsi2_wait_phy_start() argument
422 const u32 lane_mask = (1 << lanes) - 1; in rcsi2_wait_phy_start()
455 unsigned int lanes) in rcsi2_calc_mbps() argument
480 do_div(mbps, lanes * 1000000); in rcsi2_calc_mbps()
486 unsigned int *lanes) in rcsi2_get_active_lanes() argument
492 *lanes = priv->lanes; in rcsi2_get_active_lanes()
521 if (num_lanes > priv->lanes) { in rcsi2_get_active_lanes()
528 *lanes = num_lanes; in rcsi2_get_active_lanes()
537 unsigned int lanes; in rcsi2_start_receiver() local
[all …]
/Linux-v5.10/drivers/phy/tegra/
Dxusb.c35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
97 struct device_node *np, *lanes; in tegra_xusb_pad_find_phy_node() local
99 lanes = of_get_child_by_name(pad->dev.of_node, "lanes"); in tegra_xusb_pad_find_phy_node()
100 if (!lanes) in tegra_xusb_pad_find_phy_node()
103 np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); in tegra_xusb_pad_find_phy_node()
104 of_node_put(lanes); in tegra_xusb_pad_find_phy_node()
193 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
195 if (!pad->lanes) { in tegra_xusb_pad_register()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/nvidia/
Dtegra210-p2371-2180.dts22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
Dtegra186-p2771-0000.dts117 lanes {
138 lanes {
194 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
195 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
196 <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
231 nvidia,num-lanes = <4>;
236 nvidia,num-lanes = <0>;
241 nvidia,num-lanes = <1>;
/Linux-v5.10/drivers/phy/
Dphy-core-mipi-dphy.c24 unsigned int lanes, in phy_mipi_dphy_get_default_config() argument
34 do_div(hs_clk_rate, lanes); in phy_mipi_dphy_get_default_config()
76 cfg->lanes = lanes; in phy_mipi_dphy_get_default_config()

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