| /Linux-v5.10/arch/arm64/boot/dts/arm/ |
| D | rtsm_ve-aemv8a.dts | 13 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 interrupt-parent = <&gic>;
97 gic: interrupt-controller@2c001000 { label
98 compatible = "arm,gic-400", "arm,cortex-a15-gic";
149 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
151 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
152 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
153 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
154 <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | vexpress-v2f-1xv7-ca53x2.dts | 15 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 interrupt-parent = <&gic>;
82 gic: interrupt-controller@2c001000 { label
83 compatible = "arm,gic-400";
161 interrupt-map = <0 0 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
162 <0 0 1 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
163 <0 0 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
164 <0 0 3 &gic GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
165 <0 0 4 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
166 <0 0 5 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | fvp-base-revc.dts | 13 #include <dt-bindings/interrupt-controller/arm-gic.h>
23 interrupt-parent = <&gic>;
115 gic: interrupt-controller@2f000000 { label
116 compatible = "arm,gic-v3";
131 compatible = "arm,gic-v3-its";
164 interrupt-map = <0 0 0 1 &gic 0 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
165 <0 0 0 2 &gic 0 0 GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
166 <0 0 0 3 &gic 0 0 GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>,
167 <0 0 0 4 &gic 0 0 GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>;
223 interrupt-map = <0 0 0 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | foundation-v8.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
131 interrupt-map = <0 0 0 &gic 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
132 <0 0 1 &gic 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
133 <0 0 2 &gic 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
134 <0 0 3 &gic 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>,
135 <0 0 4 &gic 0 GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
136 <0 0 5 &gic 0 GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
137 <0 0 6 &gic 0 GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
138 <0 0 7 &gic 0 GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | juno-base.dtsi | 71 gic: interrupt-controller@2c010000 { label
72 compatible = "arm,gic-400", "arm,cortex-a15-gic";
85 compatible = "arm,gic-v2m-frame";
91 compatible = "arm,gic-v2m-frame";
97 compatible = "arm,gic-v2m-frame";
103 compatible = "arm,gic-v2m-frame";
549 interrupt-map = <0 0 0 1 &gic 0 GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>,
550 <0 0 0 2 &gic 0 GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
551 <0 0 0 3 &gic 0 GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
552 <0 0 0 4 &gic 0 GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /Linux-v5.10/arch/arm/boot/dts/ |
| D | vexpress-v2p-ca5s.dts | 19 interrupt-parent = <&gic>;
121 gic: interrupt-controller@2c001000 { label
122 compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic";
223 interrupt-map = <0 0 0 &gic 0 0 4>,
224 <0 0 1 &gic 0 1 4>,
225 <0 0 2 &gic 0 2 4>,
226 <0 0 3 &gic 0 3 4>,
227 <0 0 4 &gic 0 4 4>,
228 <0 0 5 &gic 0 5 4>,
229 <0 0 6 &gic 0 6 4>,
[all …]
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| D | vexpress-v2p-ca15-tc1.dts | 19 interrupt-parent = <&gic>;
94 gic: interrupt-controller@2c001000 { label
95 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
253 interrupt-map = <0 0 0 &gic 0 0 4>,
254 <0 0 1 &gic 0 1 4>,
255 <0 0 2 &gic 0 2 4>,
256 <0 0 3 &gic 0 3 4>,
257 <0 0 4 &gic 0 4 4>,
258 <0 0 5 &gic 0 5 4>,
259 <0 0 6 &gic 0 6 4>,
[all …]
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| D | vexpress-v2p-ca9.dts | 19 interrupt-parent = <&gic>;
155 gic: interrupt-controller@1e001000 { label
156 compatible = "arm,cortex-a9-gic";
311 interrupt-map = <0 0 0 &gic 0 0 4>,
312 <0 0 1 &gic 0 1 4>,
313 <0 0 2 &gic 0 2 4>,
314 <0 0 3 &gic 0 3 4>,
315 <0 0 4 &gic 0 4 4>,
316 <0 0 5 &gic 0 5 4>,
317 <0 0 6 &gic 0 6 4>,
[all …]
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| D | bcm5301x.dtsi | 15 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
88 gic: interrupt-controller@21000 { label
89 compatible = "arm,cortex-a9-gic";
171 <0x00000000 0 &gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
174 <0x00007000 0 &gic GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
175 <0x00007000 1 &gic GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
176 <0x00007000 2 &gic GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
177 <0x00007000 3 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
178 <0x00007000 4 &gic GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | bcm53573.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
41 gic: interrupt-controller@1000 { label
42 compatible = "arm,cortex-a7-gic";
82 <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
85 <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
88 <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
89 <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
90 <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
91 <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
[all …]
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| D | vexpress-v2p-ca15_a7.dts | 19 interrupt-parent = <&gic>;
149 gic: interrupt-controller@2c001000 { label
150 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
625 interrupt-map = <0 0 0 &gic 0 0 4>,
626 <0 0 1 &gic 0 1 4>,
627 <0 0 2 &gic 0 2 4>,
628 <0 0 3 &gic 0 3 4>,
629 <0 0 4 &gic 0 4 4>,
630 <0 0 5 &gic 0 5 4>,
631 <0 0 6 &gic 0 6 4>,
[all …]
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| D | exynos54xx.dtsi | 30 interrupt-parent = <&gic>;
83 <&gic GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
84 <&gic GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
85 <&gic GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
86 <&gic GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
87 <&gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
88 <&gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
89 <&gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
90 <&gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
|
| D | mstar-v7.dtsi | 8 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
57 gic: interrupt-controller@16001000 { label
58 compatible = "arm,cortex-a7-gic";
93 interrupt-parent = <&gic>;
102 interrupt-parent = <&gic>;
|
| /Linux-v5.10/drivers/irqchip/ |
| D | irq-gic.c | 337 struct gic_chip_data *gic = &gic_data[0]; in gic_handle_irq() local
338 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_handle_irq()
370 handle_domain_irq(gic->domain, irqnr, regs); in gic_handle_irq()
421 static u8 gic_get_cpumask(struct gic_chip_data *gic) in gic_get_cpumask() argument
423 void __iomem *base = gic_data_dist_base(gic); in gic_get_cpumask()
446 static void gic_cpu_if_up(struct gic_chip_data *gic) in gic_cpu_if_up() argument
448 void __iomem *cpu_base = gic_data_cpu_base(gic); in gic_cpu_if_up()
453 if (gic == &gic_data[0] && static_branch_likely(&supports_deactivate_key)) in gic_cpu_if_up()
470 static void gic_dist_init(struct gic_chip_data *gic) in gic_dist_init() argument
474 unsigned int gic_irqs = gic->gic_irqs; in gic_dist_init()
[all …]
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| D | irq-gic-pm.c | 28 struct gic_chip_data *gic = chip_pm->chip_data; in gic_runtime_resume() local
44 if (!gic) in gic_runtime_resume()
47 gic_dist_restore(gic); in gic_runtime_resume()
48 gic_cpu_restore(gic); in gic_runtime_resume()
56 struct gic_chip_data *gic = chip_pm->chip_data; in gic_runtime_suspend() local
59 gic_dist_save(gic); in gic_runtime_suspend()
60 gic_cpu_save(gic); in gic_runtime_suspend()
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| D | Makefile | 29 obj-$(CONFIG_ARM_GIC) += irq-gic.o irq-gic-common.o
30 obj-$(CONFIG_ARM_GIC_PM) += irq-gic-pm.o
31 obj-$(CONFIG_ARCH_REALVIEW) += irq-gic-realview.o
32 obj-$(CONFIG_ARM_GIC_V2M) += irq-gic-v2m.o
33 obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-v3-mbi.o irq-gic-common.o
34 obj-$(CONFIG_ARM_GIC_V3_ITS) += irq-gic-v3-its.o irq-gic-v3-its-platform-msi.o irq-gic-v4.o
35 obj-$(CONFIG_ARM_GIC_V3_ITS_PCI) += irq-gic-v3-its-pci-msi.o
36 obj-$(CONFIG_ARM_GIC_V3_ITS_FSL_MC) += irq-gic-v3-its-fsl-mc-msi.o
71 obj-$(CONFIG_MIPS_GIC) += irq-mips-gic.o
|
| /Linux-v5.10/arch/arm64/boot/dts/xilinx/ |
| D | zynqmp.dtsi | 109 interrupt-parent = <&gic>;
129 interrupt-parent = <&gic>;
170 interrupt-parent = <&gic>;
191 gic: interrupt-controller@f9010000 { label
192 compatible = "arm,gic-400";
199 interrupt-parent = <&gic>;
216 interrupt-parent = <&gic>;
228 interrupt-parent = <&gic>;
244 interrupt-parent = <&gic>;
258 interrupt-parent = <&gic>;
[all …]
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| /Linux-v5.10/arch/arm64/boot/dts/renesas/ |
| D | r8a779a0.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
53 interrupts-extended = <&gic GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
54 <&gic GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
55 <&gic GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
56 <&gic GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
68 interrupt-parent = <&gic>;
108 gic: interrupt-controller@f1000000 { label
109 compatible = "arm,gic-v3";
128 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
129 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_LOW)>,
[all …]
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| /Linux-v5.10/arch/arm64/boot/dts/cavium/ |
| D | thunder2-99xx.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 interrupt-parent = <&gic>;
58 gic: interrupt-controller@400080000 { label
59 compatible = "arm,gic-v3";
70 gicits: gic-its@40010000 {
71 compatible = "arm,gic-v3-its";
121 <0 0 0 1 &gic 0 0 GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
122 0 0 0 2 &gic 0 0 GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
123 0 0 0 3 &gic 0 0 GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
124 0 0 0 4 &gic 0 0 GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
[all …]
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| /Linux-v5.10/Documentation/devicetree/bindings/bus/ |
| D | brcm,bus-axi.txt | 34 <0x00024000 0 &gic GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
37 <0x00025000 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
40 <0x00012000 0 &gic GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
41 <0x00012000 1 &gic GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
42 <0x00012000 2 &gic GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
43 <0x00012000 3 &gic GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
44 <0x00012000 4 &gic GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
45 <0x00012000 5 &gic GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
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| /Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/ |
| D | fsl,ls-extirq.txt | 37 <0 0 &gic GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
38 <1 0 &gic GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>,
39 <2 0 &gic GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
40 <3 0 &gic GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
41 <4 0 &gic GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>,
42 <5 0 &gic GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
48 interrupts-extended = <&gic GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
|
| /Linux-v5.10/arch/arm64/boot/dts/freescale/ |
| D | s32v234.dtsi | 7 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
87 gic: interrupt-controller@7d001000 { label
88 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
104 interrupt-parent = <&gic>;
111 interrupt-parent = <&gic>;
127 interrupt-parent = <&gic>;
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| /Linux-v5.10/arch/mips/boot/dts/img/ |
| D | boston.dts | 7 #include <dt-bindings/interrupt-controller/mips-gic.h>
48 interrupt-parent = <&gic>;
78 interrupt-parent = <&gic>;
108 interrupt-parent = <&gic>;
181 gic: interrupt-controller@16120000 { label
182 compatible = "mti,gic";
189 compatible = "mti,gic-timer";
227 interrupt-parent = <&gic>;
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| /Linux-v5.10/arch/mips/boot/dts/mti/ |
| D | malta.dts | 5 #include <dt-bindings/interrupt-controller/mips-gic.h>
23 gic: interrupt-controller@1bdc0000 { label
24 compatible = "mti,gic";
31 * Declare the interrupt-parent even though the mti,gic
39 compatible = "mti,gic-timer";
50 interrupt-parent = <&gic>;
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| /Linux-v5.10/include/linux/irqchip/ |
| D | arm-gic.h | 137 void gic_cpu_save(struct gic_chip_data *gic);
138 void gic_cpu_restore(struct gic_chip_data *gic);
139 void gic_dist_save(struct gic_chip_data *gic);
140 void gic_dist_restore(struct gic_chip_data *gic);
152 int gic_of_init_child(struct device *dev, struct gic_chip_data **gic, int irq);
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