Searched refs:dram_type (Results 1 – 13 of 13) sorted by relevance
296 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()312 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()316 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()319 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()322 ast->dram_type = AST_DRAM_8Gx16; in ast_get_dram_info()328 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()332 ast->dram_type = AST_DRAM_1Gx16; in ast_get_dram_info()335 ast->dram_type = AST_DRAM_2Gx16; in ast_get_dram_info()338 ast->dram_type = AST_DRAM_4Gx16; in ast_get_dram_info()345 ast->dram_type = AST_DRAM_512Mx16; in ast_get_dram_info()[all …]
317 if (ast->dram_type == AST_DRAM_1Gx16) in ast_init_dram_reg()319 else if (ast->dram_type == AST_DRAM_1Gx32) in ast_init_dram_reg()400 u32 dram_type; member1624 param.dram_type = AST_DDR3; in ast_post_chip_2300()1627 param.dram_type = AST_DDR2; in ast_post_chip_2300()1662 if (param.dram_type == AST_DDR3) { in ast_post_chip_2300()
127 uint32_t dram_type; member
619 u32 value, dram_type; in tegra210_emc_r21021_set_clock() local631 dram_type = value >> EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; in tegra210_emc_r21021_set_clock()638 dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()641 if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()645 (dram_type == DRAM_TYPE_LPDDR2)) in tegra210_emc_r21021_set_clock()677 emc_dbg(emc, INFO, "DRAM type = %d\n", dram_type); in tegra210_emc_r21021_set_clock()863 if (src_clk_period > 50000 && dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()874 if (dram_type == DRAM_TYPE_LPDDR4) in tegra210_emc_r21021_set_clock()876 else if (dram_type == DRAM_TYPE_LPDDR2 || is_lpddr3) in tegra210_emc_r21021_set_clock()879 else if (dram_type == DRAM_TYPE_DDR3) in tegra210_emc_r21021_set_clock()[all …]
472 enum emc_dram_type dram_type; member599 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()694 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_prepare_timing_change()721 if (emc->dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_OFF) in tegra_emc_prepare_timing_change()727 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()736 if (emc->dram_type == DRAM_TYPE_DDR3) in tegra_emc_prepare_timing_change()744 if (emc->dram_type == DRAM_TYPE_DDR3) { in tegra_emc_prepare_timing_change()819 if (emc->dram_type == DRAM_TYPE_LPDDR3 && in tegra_emc_complete_timing_change()827 if (emc->dram_type == DRAM_TYPE_DDR3 && in tegra_emc_complete_timing_change()871 emc->dram_type = readl(emc->regs + EMC_FBIO_CFG5); in emc_init()[all …]
486 enum emc_dram_type dram_type; in emc_prepare_timing_change() local531 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_prepare_timing_change()607 if (dram_type == DRAM_TYPE_DDR3 && dll_change == DLL_CHANGE_ON) { in emc_prepare_timing_change()660 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()690 if (dram_type == DRAM_TYPE_DDR3) in emc_prepare_timing_change()695 if (dram_type == DRAM_TYPE_DDR3) { in emc_prepare_timing_change()1011 enum emc_dram_type dram_type; in emc_setup_hw() local1014 dram_type = fbio_cfg5 & EMC_FBIO_CFG5_DRAM_TYPE_MASK; in emc_setup_hw()1022 switch (dram_type) { in emc_setup_hw()
772 if ((emc->dram_type != DRAM_TYPE_LPDDR2 && in tegra210_emc_set_refresh()773 emc->dram_type != DRAM_TYPE_LPDDR4) || in tegra210_emc_set_refresh()1791 emc->dram_type = value & 0x3; in tegra210_emc_detect()
908 unsigned int dram_type; member
25 enum intel_dram_type dram_type; member44 qi->dram_type = INTEL_DRAM_DDR4; in icl_pcode_read_mem_global_info()47 qi->dram_type = INTEL_DRAM_LPDDR4; in icl_pcode_read_mem_global_info()50 qi->dram_type = INTEL_DRAM_DDR3; in icl_pcode_read_mem_global_info()53 qi->dram_type = INTEL_DRAM_LPDDR3; in icl_pcode_read_mem_global_info()62 qi->dram_type = INTEL_DRAM_DDR4; in icl_pcode_read_mem_global_info()65 qi->dram_type = INTEL_DRAM_DDR3; in icl_pcode_read_mem_global_info()68 qi->dram_type = INTEL_DRAM_LPDDR3; in icl_pcode_read_mem_global_info()71 qi->dram_type = INTEL_DRAM_LPDDR4; in icl_pcode_read_mem_global_info()79 qi->dram_type = INTEL_DRAM_LPDDR3; /* Conservative default */ in icl_pcode_read_mem_global_info()[all …]
51 static int dram_type; variable477 if (dram_type == SYSCFG0_DRAM_TYPE_SDRAM) in mt7620_get_dram_rate()599 switch (dram_type) { in mt7620_dram_init()625 switch (dram_type) { in mt7628_dram_init()692 dram_type = cfg0 & DRAM_TYPE_MT7628_MASK; in prom_soc_init()694 dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & in prom_soc_init()696 if (dram_type == SYSCFG0_DRAM_TYPE_UNKNOWN) in prom_soc_init()697 dram_type = SYSCFG0_DRAM_TYPE_SDRAM; in prom_soc_init()
234 u32 nr_pages, dram_type; in init_csrows() local265 dram_type = (reg04 & ASPEED_MCR_CONF_DRAM_TYPE) ? MEM_DDR4 : MEM_DDR3; in init_csrows()268 dimm->mtype = dram_type; in init_csrows()
754 if (pvt->dram_type == MEM_LRDDR3) { in debug_dump_dramcfg_low()859 if (pvt->dram_type == MEM_LRDDR4) { in __dump_misc_regs_df()1052 pvt->dram_type = MEM_LRDDR4; in determine_memory_type()1054 pvt->dram_type = MEM_RDDR4; in determine_memory_type()1056 pvt->dram_type = MEM_DDR4; in determine_memory_type()1065 pvt->dram_type = (pvt->dclr0 & BIT(18)) ? MEM_DDR : MEM_RDDR; in determine_memory_type()1072 pvt->dram_type = (pvt->dclr0 & BIT(16)) ? MEM_DDR2 : MEM_RDDR2; in determine_memory_type()1092 pvt->dram_type = MEM_DDR4; in determine_memory_type()1094 pvt->dram_type = MEM_DDR3; in determine_memory_type()1096 pvt->dram_type = MEM_LRDDR3; in determine_memory_type()[all …]
389 enum mem_type dram_type; member
