Searched refs:dpcd_val (Results 1 – 2 of 2) sorted by relevance
541 u8 dpcd_val; in ti_sn_bridge_read_valid_rates() local545 ret = drm_dp_dpcd_readb(&pdata->aux, DP_EDP_DPCD_REV, &dpcd_val); in ti_sn_bridge_read_valid_rates()549 dpcd_val = DP_EDP_11; in ti_sn_bridge_read_valid_rates()552 if (dpcd_val >= DP_EDP_14) { in ti_sn_bridge_read_valid_rates()591 ret = drm_dp_dpcd_readb(&pdata->aux, DP_MAX_LINK_RATE, &dpcd_val); in ti_sn_bridge_read_valid_rates()596 dpcd_val = DP_LINK_BW_5_4; in ti_sn_bridge_read_valid_rates()599 switch (dpcd_val) { in ti_sn_bridge_read_valid_rates()603 (int)dpcd_val); in ti_sn_bridge_read_valid_rates()
399 u8 dpcd_val = DP_PSR_ENABLE; in intel_psr_enable_sink() local407 dpcd_val |= DP_PSR_ENABLE_PSR2 | DP_PSR_IRQ_HPD_WITH_CRC_ERRORS; in intel_psr_enable_sink()410 dpcd_val |= DP_PSR_MAIN_LINK_ACTIVE; in intel_psr_enable_sink()413 dpcd_val |= DP_PSR_CRC_VERIFICATION; in intel_psr_enable_sink()416 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, dpcd_val); in intel_psr_enable_sink()
