| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce110/ |
| D | dce110_compressor.c | 83 status_pos = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION)); in reset_lb_on_vblank()
87 if (status_pos != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_POSITION))) { in reset_lb_on_vblank()
89 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); in reset_lb_on_vblank()
94 frame_count = dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT)); in reset_lb_on_vblank()
98 if (frame_count != dm_read_reg(compressor->ctx, DCP_REG(mmCRTC_STATUS_FRAME_COUNT))) in reset_lb_on_vblank()
106 value = dm_read_reg(compressor->ctx, DCP_REG(mmLB_SYNC_RESET_SEL)); in reset_lb_on_vblank()
122 value = dm_read_reg(cp110->base.ctx, addr); in wait_for_fbc_state_changed()
148 value = dm_read_reg(compressor->ctx, addr); in dce110_compressor_power_up_fbc()
163 value = dm_read_reg(compressor->ctx, addr); in dce110_compressor_power_up_fbc()
170 value = dm_read_reg(compressor->ctx, addr); in dce110_compressor_power_up_fbc()
[all …]
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| D | dce110_timing_generator_v.c | 85 value = dm_read_reg(tg->ctx, in dce110_timing_generator_v_disable_crtc()
103 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_blank_crtc()
123 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_unblank_crtc()
148 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_v_is_in_vertical_blank()
161 value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION); in dce110_timing_generator_v_is_counter_moving()
173 value = dm_read_reg(tg->ctx, mmCRTCV_STATUS_POSITION); in dce110_timing_generator_v_is_counter_moving()
260 value = dm_read_reg(ctx, addr); in dce110_timing_generator_v_program_blanking()
269 value = dm_read_reg(ctx, addr); in dce110_timing_generator_v_program_blanking()
278 value = dm_read_reg(ctx, addr); in dce110_timing_generator_v_program_blanking()
301 value = dm_read_reg(ctx, addr); in dce110_timing_generator_v_program_blanking()
[all …]
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| D | dce110_mem_input_v.c | 44 value = dm_read_reg( in set_flip_control()
157 value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_ENABLE); in enable()
370 value = dm_read_reg( in program_pixel_format()
422 value = dm_read_reg( in program_pixel_format()
442 value = dm_read_reg( in program_pixel_format()
476 value = dm_read_reg(mem_input110->base.ctx, mmUNP_GRPH_UPDATE); in dce_mem_input_v_is_surface_pending()
607 value = dm_read_reg(mem_input110->base.ctx, mmUNP_PIPE_OUTSTANDING_REQUEST_LIMIT); in dce_mem_input_v_program_pte_vm()
613 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL); in dce_mem_input_v_program_pte_vm()
619 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_ARB_CONTROL); in dce_mem_input_v_program_pte_vm()
624 value = dm_read_reg(mem_input110->base.ctx, mmUNP_DVMM_PTE_CONTROL_C); in dce_mem_input_v_program_pte_vm()
[all …]
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| D | dce110_timing_generator.c | 100 value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_is_in_vertical_blank()
113 regval = dm_read_reg(tg->ctx, address); in dce110_timing_generator_set_early_control()
157 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_program_blank_color()
199 value = dm_read_reg(tg->ctx, addr);
262 regval = dm_read_reg(tg->ctx, in program_horz_count_by_2()
379 v_total_min = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_set_drr()
382 v_total_max = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_set_drr()
385 v_total_cntl = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_set_drr()
484 static_screen_cntl = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_set_static_screen_control()
517 uint32_t value = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_get_vblank_counter()
[all …]
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| D | dce110_opp_regamma_v.c | 39 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut()
73 value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in power_on_lut()
90 value = dm_read_reg(xfm_dce->base.ctx, in set_bypass_input_gamma()
523 uint32_t value = dm_read_reg(xfm->ctx, mmDCFEV_MEM_PWR_CTRL); in dce110_opp_power_on_regamma_lut_v()
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| D | dce110_opp_csc_v.c | 114 uint32_t cntl_value = dm_read_reg(ctx, mmCOL_MAN_OUTPUT_CSC_CONTROL); in program_color_matrix_v()
366 uint32_t value = dm_read_reg(ctx, addr); in configure_graphics_mode_v()
465 uint32_t value = dm_read_reg(xfm->ctx, mmDENORM_CLAMP_CONTROL); in set_Denormalization()
555 value = dm_read_reg(ctx, mmCOL_MAN_INPUT_CSC_CONTROL); in program_input_csc()
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| D | dce110_transform_v.c | 280 value = dm_read_reg(xfm_dce->base.ctx, mmSCLV_UPDATE); in set_coeff_update_complete()
304 power_ctl = dm_read_reg(ctx, mmDCFEV_MEM_PWR_CTRL); in program_multi_taps_filter()
312 dm_read_reg(ctx, mmDCFEV_MEM_PWR_STATUS), in program_multi_taps_filter()
511 value = dm_read_reg(xfm_dce->base.ctx, mmLBV_MEMORY_CTRL); in dce110_xfmv_power_up_line_buffer()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce112/ |
| D | dce112_compressor.c | 302 value = dm_read_reg(cp110->base.ctx, addr); in wait_for_fbc_state_changed()
325 value = dm_read_reg(compressor->ctx, addr); in dce112_compressor_power_up_fbc()
340 value = dm_read_reg(compressor->ctx, addr); in dce112_compressor_power_up_fbc()
347 value = dm_read_reg(compressor->ctx, addr); in dce112_compressor_power_up_fbc()
394 value = dm_read_reg(compressor->ctx, addr); in dce112_compressor_enable_fbc()
425 reg_data = dm_read_reg(compressor->ctx, mmFBC_CNTL); in dce112_compressor_disable_fbc()
449 value = dm_read_reg(compressor->ctx, mmFBC_STATUS); in dce112_compressor_is_fbc_enabled_in_hw()
456 value = dm_read_reg(compressor->ctx, mmFBC_MISC); in dce112_compressor_is_fbc_enabled_in_hw()
458 value = dm_read_reg(compressor->ctx, mmFBC_CNTL); in dce112_compressor_is_fbc_enabled_in_hw()
473 uint32_t value = dm_read_reg(compressor->ctx, in dce112_compressor_is_lpt_enabled_in_hw()
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| D | dce112_hw_sequencer.c | 77 value = dm_read_reg(ctx, addr); in dce112_init_pte()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce60/ |
| D | dce60_timing_generator.c | 92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce60_timing_generator_enable_advanced_request()
133 uint32_t value2 = dm_read_reg(tg->ctx, addr2); in dce60_timing_generator_enable_advanced_request()
186 value = dm_read_reg(tg->ctx, addr); in dce60_is_tg_enabled()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/ |
| D | dc_helper.c | 264 reg_val = dm_read_reg(ctx, addr); in generic_reg_update_ex()
328 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get()
337 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get2()
348 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get3()
361 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get4()
376 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get5()
393 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get6()
412 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get7()
433 uint32_t reg_val = dm_read_reg(ctx, addr); in generic_reg_get8()
507 reg_val = dm_read_reg(ctx, addr); in generic_reg_wait()
[all …]
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/ |
| D | irq_service.c | 98 uint32_t value = dm_read_reg(irq_service->ctx, addr); in dal_irq_service_set_generic()
135 uint32_t value = dm_read_reg(irq_service->ctx, addr); in dal_irq_service_ack_generic()
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| /Linux-v5.10/drivers/net/usb/ |
| D | dm9601.c | 72 static int dm_read_reg(struct usbnet *dev, u8 reg, u8 *value) in dm_read_reg() function
123 ret = dm_read_reg(dev, DM_SHARED_CTRL, &tmp); in dm_read_shared_word()
166 ret = dm_read_reg(dev, DM_SHARED_CTRL, &tmp); in dm_write_shared_word()
402 if (dm_read_reg(dev, DM_CHIP_ID, &id) < 0) { in dm9601_bind()
412 if (dm_read_reg(dev, DM_MODE_CTRL, &mode) < 0) { in dm9601_bind()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce80/ |
| D | dce80_timing_generator.c | 92 uint32_t value = dm_read_reg(tg->ctx, addr); in program_pix_dur()
130 uint32_t value = dm_read_reg(tg->ctx, addr); in dce80_timing_generator_enable_advanced_request()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dce80/ |
| D | irq_service_dce80.c | 47 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
56 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dce120/ |
| D | irq_service_dce120.c | 47 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
56 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dce60/ |
| D | irq_service_dce60.c | 54 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
63 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dcn10/ |
| D | irq_service_dcn10.c | 128 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
137 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dcn20/ |
| D | irq_service_dcn20.c | 128 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
137 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dcn21/ |
| D | irq_service_dcn21.c | 129 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
138 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dcn30/ |
| D | irq_service_dcn30.c | 135 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
144 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/irq/dce110/ |
| D | irq_service_dce110.c | 48 uint32_t value = dm_read_reg(irq_service->ctx, addr); in hpd_ack()
55 value = dm_read_reg(irq_service->ctx, info->enable_reg); in hpd_ack()
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce120/ |
| D | dce120_hw_sequencer.c | 113 value = dm_read_reg(ctx, addr);
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_dio_link_encoder.c | 211 dm_read_reg(CTX, AUX_REG(reg_name))
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| /Linux-v5.10/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dce_link_encoder.c | 595 uint32_t value = dm_read_reg(ctx, addr); in aux_initialize()
602 value = dm_read_reg(ctx, addr); in aux_initialize()
1610 uint32_t value = dm_read_reg(ctx, addr); in dce110_link_encoder_enable_hpd()
1623 uint32_t value = dm_read_reg(ctx, addr); in dce110_link_encoder_disable_hpd()
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