Searched refs:dcefclk (Results 1 – 5 of 5) sorted by relevance
536 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()551 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()571 &smu->smu_table.boot_values.dcefclk); in smu_v11_0_get_vbios_bootup_values()824 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
741 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()759 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()777 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()795 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()
718 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()736 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()754 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()772 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()
215 uint32_t dcefclk; member
1041 smu->smu_table.boot_values.dcefclk / 100); in smu_smc_hw_setup()
