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Searched refs:WREG32_SOC15_OFFSET (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/amd/amdgpu/
Dmmhub_v9_4.c62 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_setup_hubid_vm_pt_regs()
67 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_setup_hubid_vm_pt_regs()
81 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs()
85 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs()
90 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs()
94 WREG32_SOC15_OFFSET(MMHUB, 0, in mmhub_v9_4_init_gart_aperture_regs()
117 WREG32_SOC15_OFFSET(MMHUB, 0, mmVMSHAREDVC0_MC_VM_AGP_BASE, in mmhub_v9_4_init_system_aperture_regs()
120 WREG32_SOC15_OFFSET(MMHUB, 0, mmVMSHAREDVC0_MC_VM_AGP_TOP, in mmhub_v9_4_init_system_aperture_regs()
123 WREG32_SOC15_OFFSET(MMHUB, 0, mmVMSHAREDVC0_MC_VM_AGP_BOT, in mmhub_v9_4_init_system_aperture_regs()
129 WREG32_SOC15_OFFSET( in mmhub_v9_4_init_system_aperture_regs()
[all …]
Dgfxhub_v1_0.c43 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v1_0_setup_vm_pt_regs()
47 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v1_0_setup_vm_pt_regs()
249 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_CNTL, in gfxhub_v1_0_setup_vmid_config()
251 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_setup_vmid_config()
253 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_setup_vmid_config()
255 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_setup_vmid_config()
258 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_setup_vmid_config()
270 WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v1_0_program_invalidation()
272 WREG32_SOC15_OFFSET(GC, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v1_0_program_invalidation()
315 WREG32_SOC15_OFFSET(GC, 0, mmVM_CONTEXT0_CNTL, in gfxhub_v1_0_gart_disable()
Dgfxhub_v2_0.c125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_0_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_0_setup_vm_pt_regs()
317 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_0_setup_vmid_config()
319 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config()
321 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config()
323 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_setup_vmid_config()
326 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_setup_vmid_config()
338 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_0_program_invalidation()
340 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_0_program_invalidation()
369 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_0_gart_disable()
Dgfxhub_v2_1.c125 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in gfxhub_v2_1_setup_vm_pt_regs()
129 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in gfxhub_v2_1_setup_vm_pt_regs()
323 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_CNTL, in gfxhub_v2_1_setup_vmid_config()
325 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config()
327 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_setup_vmid_config()
329 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_setup_vmid_config()
332 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_setup_vmid_config()
344 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in gfxhub_v2_1_program_invalidation()
346 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in gfxhub_v2_1_program_invalidation()
387 WREG32_SOC15_OFFSET(GC, 0, mmGCVM_CONTEXT0_CNTL, in gfxhub_v2_1_gart_disable()
Dmmhub_v2_0.c167 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v2_0_setup_vm_pt_regs()
171 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v2_0_setup_vm_pt_regs()
373 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_CNTL, in mmhub_v2_0_setup_vmid_config()
375 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_0_setup_vmid_config()
377 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_0_setup_vmid_config()
379 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_0_setup_vmid_config()
382 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_0_setup_vmid_config()
394 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v2_0_program_invalidation()
396 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v2_0_program_invalidation()
425 WREG32_SOC15_OFFSET(MMHUB, 0, mmMMVM_CONTEXT0_CNTL, in mmhub_v2_0_gart_disable()
Dmmhub_v1_0.c59 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_LO32, in mmhub_v1_0_setup_vm_pt_regs()
63 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR_HI32, in mmhub_v1_0_setup_vm_pt_regs()
272 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_CNTL, in mmhub_v1_0_setup_vmid_config()
274 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_0_setup_vmid_config()
276 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_0_setup_vmid_config()
278 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_0_setup_vmid_config()
281 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT1_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_0_setup_vmid_config()
293 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_LO32, in mmhub_v1_0_program_invalidation()
295 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_INVALIDATE_ENG0_ADDR_RANGE_HI32, in mmhub_v1_0_program_invalidation()
348 WREG32_SOC15_OFFSET(MMHUB, 0, mmVM_CONTEXT0_CNTL, in mmhub_v1_0_gart_disable()
Dsoc15_common.h50 #define WREG32_SOC15_OFFSET(ip, inst, reg, offset, value) \ macro
Dgfx_v9_0.c2505 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v9_0_init_compute_vmid()
2506 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); in gfx_v9_0_init_compute_vmid()
2507 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v9_0_init_compute_vmid()
2508 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v9_0_init_compute_vmid()
2523 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v9_0_init_gds_vmid()
2524 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v9_0_init_gds_vmid()
2525 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
2526 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v9_0_init_gds_vmid()
Dgfx_v10_0.c4682 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * i, 0); in gfx_v10_0_init_compute_vmid()
4683 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * i, 0); in gfx_v10_0_init_compute_vmid()
4684 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
4685 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, i, 0); in gfx_v10_0_init_compute_vmid()
4700 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_BASE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid()
4701 WREG32_SOC15_OFFSET(GC, 0, mmGDS_VMID0_SIZE, 2 * vmid, 0); in gfx_v10_0_init_gds_vmid()
4702 WREG32_SOC15_OFFSET(GC, 0, mmGDS_GWS_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()
4703 WREG32_SOC15_OFFSET(GC, 0, mmGDS_OA_VMID0, vmid, 0); in gfx_v10_0_init_gds_vmid()