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Searched refs:RX0 (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.10/arch/x86/crypto/
Dblowfish-x86_64-asm_64.S24 #define RX0 %rax macro
60 rorq $16, RX0; \
63 rolq $16, RX0; \
68 rolq $32, RX0; \
71 xorq RT0, RX0;
74 xorq p+4*(n)(CTX), RX0;
85 xorq RT0, RX0;
94 movq (RIO), RX0; \
95 rorq $32, RX0; \
96 bswapq RX0;
[all …]
Dtwofish-avx-x86_64-asm_64.S52 #define RX0 %xmm8 macro
180 round_head_2(a, b, RX0, RY0, RX1, RY1); \
181 encround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
188 round_head_2(a, b, RX0, RY0, RX1, RY1); \
189 decround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
251 inpack_blocks(RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
254 inpack_blocks(RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
272 outunpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
273 outunpack_blocks(RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
292 inpack_blocks(RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
[all …]
Dtwofish-x86_64-asm_64-3way.S53 #define RX0 %r8 macro
146 enc_round_end(ab ## 0, RX0, RY0, n); \
153 dec_round_end(ba ## 0, RX0, RY0, n); \
/Linux-v5.10/drivers/phy/rockchip/
DKconfig13 tristate "Rockchip MIPI Synopsys DPHY RX0 driver"
18 Enable this to support the Rockchip MIPI Synopsys DPHY RX0
/Linux-v5.10/arch/powerpc/boot/dts/
Deiger.dts138 /*COAL RX0*/ 0x1c 0x2
Dredwood.dts134 /*COAL RX0*/ 0x1c 0x2
/Linux-v5.10/drivers/pinctrl/renesas/
Dpfc-r8a77970.c214 #define IP7_23_20 FM(SCL2) FM(DU_DB0) FM(TCLK1_A) FM(WE1_N) FM(RX0) FM(MSIOF0_SS1) F_(0, 0) F_…
672 PINMUX_IPSR_GPSR(IP7_23_20, RX0),
Dpfc-r8a77980.c247 #define IP7_23_20 FM(SCL2) F_(0, 0) F_(0, 0) FM(WE1_N) FM(RX0) FM(HRX0_B) F_(0, 0) F_(0, 0) F_…
736 PINMUX_IPSR_GPSR(IP7_23_20, RX0),
Dpfc-r8a77950.c209 #define GPSR5_1 F_(RX0, IP10_31_28)
345 #define IP10_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1139 PINMUX_IPSR_GPSR(IP10_31_28, RX0),
Dpfc-r8a77951.c210 #define GPSR5_1 F_(RX0, IP11_31_28)
355 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1185 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
Dpfc-r8a7796.c214 #define GPSR5_1 F_(RX0, IP11_31_28)
359 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1191 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
Dpfc-r8a77965.c215 #define GPSR5_1 F_(RX0, IP11_31_28)
360 #define IP11_31_28 FM(RX0) FM(HRX1_B) F_(0, 0) F_(0, 0) F_(0, 0) FM(TS_SCK0_C) FM(STP_ISCLK_0_…
1195 PINMUX_IPSR_GPSR(IP11_31_28, RX0),
Dpfc-r8a7792.c449 PINMUX_SINGLE(RX0),
Dpfc-r8a7779.c1142 PINMUX_IPSR_MSEL(IP8_15_12, RX0, SEL_SCIF0_0),
Dpfc-r8a7790.c1597 PINMUX_IPSR_MSEL(IP14_8_6, RX0, SEL_SCIF0_0),
Dpfc-r8a7791.c907 PINMUX_IPSR_MSEL(IP2_12_10, RX0, SEL_SCIF0_0),