Searched refs:MMP2_CLK_CCIC0 (Results 1 – 4 of 4) sorted by relevance
75 #define MMP2_CLK_CCIC0 112 macro
376 …{MMP2_CLK_CCIC0, "ccic0_clk", "ccic0_mix_clk", CLK_SET_RATE_PARENT, APMU_CCIC0, 0x1b, 0x1b, 0x0, 0…
190 clocks = <&soc_clocks MMP2_CLK_CCIC0>;
297 clocks = <&soc_clocks MMP2_CLK_CCIC0>;