Searched refs:DPC (Results 1 – 9 of 9) sorted by relevance
121 This enables PCI Express Downstream Port Containment (DPC)122 driver support. DPC events from Root and Downstream ports123 will be handled by the DPC driver. If your system doesn't151 support hybrid DPC model which uses both firmware and OS to152 implement DPC.
12 Dynamic Power Control (DPC)28 * 1: DPC current mode29 * 2: DPC voltage mode
18 * VOU DPC device22 - reg: Physical base address and length of DPC register regions, one for each30 - interrupts: VOU DPC interrupt number to CPU
129 tristate "Olympus MAUSB-10/Fuji DPC-R1 support"132 and Fujifilm DPC-R1 USB Card reader/writer devices.
70 dpc:DPC
25 #define DPC(a) (printk("(a): %c\n",(a))) macro
73 #define DPC 0x4 macro
573 * Backround nodev_timeout processing to DPC This enables us to842 Used host_lock for DPC to avoid race (remove dpc_lock)
3802 native Use native PCIe services (PME, AER, DPC, PCIe hotplug)3806 dpc-native Use native PCIe service for DPC only. May3807 cause conflicts if firmware uses AER or DPC.3808 compat Disable native PCIe services (PME, AER, DPC, PCIe
