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Searched refs:BLC_PWM_CTL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.10/drivers/gpu/drm/gma500/
Dpsb_intel_lvds.c66 ret = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
78 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
148 REG_WRITE(BLC_PWM_CTL, in psb_lvds_pwm_set_brightness()
190 blc_pwm_ctl = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_set_backlight()
192 REG_WRITE(BLC_PWM_CTL, in psb_intel_lvds_set_backlight()
269 lvds_priv->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_save()
310 REG_WRITE(BLC_PWM_CTL, lvds_priv->saveBLC_PWM_CTL); in psb_intel_lvds_restore()
435 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in psb_intel_lvds_prepare()
Dcdv_device.c80 u32 max = REG_READ(BLC_PWM_CTL); in cdv_get_max_backlight()
98 u32 val = REG_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in cdv_get_brightness()
134 blc_pwm_ctl = REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_set_brightness()
135 REG_WRITE(BLC_PWM_CTL, (blc_pwm_ctl | in cdv_set_brightness()
280 regs->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_save_display_registers()
353 REG_WRITE(BLC_PWM_CTL, regs->saveBLC_PWM_CTL); in cdv_restore_display_registers()
Doaktrail_device.c68 max_pwm_blc = REG_READ(BLC_PWM_CTL) >> 16; in oaktrail_set_brightness()
85 REG_WRITE(BLC_PWM_CTL, (max_pwm_blc << 16) | blc_pwm_ctl); in oaktrail_set_brightness()
126 REG_WRITE(BLC_PWM_CTL, value | (value << 16)); in device_backlight_init()
236 regs->saveBLC_PWM_CTL = PSB_RVDC32(BLC_PWM_CTL); in oaktrail_save_display_registers()
366 PSB_WVDC32(regs->saveBLC_PWM_CTL, BLC_PWM_CTL); in oaktrail_restore_display_registers()
Dcdv_intel_lvds.c64 retval = ((REG_READ(BLC_PWM_CTL) & in cdv_intel_lvds_get_max_backlight()
89 REG_READ(BLC_PWM_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK; in cdv_intel_lvds_set_backlight()
90 REG_WRITE(BLC_PWM_CTL, in cdv_intel_lvds_set_backlight()
236 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in cdv_intel_lvds_prepare()
Doaktrail_lvds.c165 mode_dev->saveBLC_PWM_CTL = REG_READ(BLC_PWM_CTL); in oaktrail_lvds_prepare()
178 ret = ((REG_READ(BLC_PWM_CTL) & in oaktrail_lvds_get_max_backlight()
Dpsb_device.c86 REG_WRITE(BLC_PWM_CTL, in psb_backlight_setup()
Dpsb_intel_reg.h80 #define BLC_PWM_CTL 0x61254 macro
/Linux-v5.10/drivers/gpu/drm/i915/display/
Dintel_panel.c553 val = intel_de_read(dev_priv, BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK; in i9xx_get_backlight()
644 tmp = intel_de_read(dev_priv, BLC_PWM_CTL) & ~mask; in i9xx_set_backlight()
645 intel_de_write(dev_priv, BLC_PWM_CTL, tmp | level); in i9xx_set_backlight()
984 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); in i9xx_enable_backlight()
987 intel_de_write(dev_priv, BLC_PWM_CTL, 0); in i9xx_enable_backlight()
1000 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); in i9xx_enable_backlight()
1001 intel_de_posting_read(dev_priv, BLC_PWM_CTL); in i9xx_enable_backlight()
1036 intel_de_write(dev_priv, BLC_PWM_CTL, ctl); in i965_enable_backlight()
1711 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); in i9xx_setup_backlight()
1754 ctl = intel_de_read(dev_priv, BLC_PWM_CTL); in i965_setup_backlight()
/Linux-v5.10/drivers/gpu/drm/i915/
Di915_reg.h5123 #define BLC_PWM_CTL _MMIO(DISPLAY_MMIO_BASE(dev_priv) + 0x61254) macro