Searched refs:vgpu_cfg_space (Results 1 – 4 of 4) sorted by relevance
67 u8 *cfg_base = vgpu_cfg_space(vgpu); in vgpu_pci_cfg_mem_write()107 memcpy(p_data, vgpu_cfg_space(vgpu) + offset, bytes); in intel_vgpu_emulate_cfg_read()122 val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_2]; in map_aperture()124 val = *(u64 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_2); in map_aperture()126 val = *(u32 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_2); in map_aperture()150 val = vgpu_cfg_space(vgpu)[PCI_BASE_ADDRESS_0]; in trap_gttmmio()152 start = *(u64 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_0); in trap_gttmmio()154 start = *(u32 *)(vgpu_cfg_space(vgpu) + PCI_BASE_ADDRESS_0); in trap_gttmmio()170 u8 old = vgpu_cfg_space(vgpu)[offset]; in emulate_pci_command_write()201 u32 *pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in emulate_pci_rom_bar_write()[all …]
125 control = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_CONTROL(offset)); in intel_gvt_hypervisor_inject_msi()126 addr = *(u32 *)(vgpu_cfg_space(vgpu) + MSI_CAP_ADDRESS(offset)); in intel_gvt_hypervisor_inject_msi()127 data = *(u16 *)(vgpu_cfg_space(vgpu) + MSI_CAP_DATA(offset)); in intel_gvt_hypervisor_inject_msi()
116 #define vgpu_cfg_space(vgpu) ((vgpu)->cfg_space.virtual_cfg_space) macro468 pval = (u32 *)(vgpu_cfg_space(vgpu) + offset); in intel_vgpu_write_pci_bar()
515 if ((vgpu_cfg_space(vgpu)[INTEL_GVT_PCI_SWSCI] in intel_vgpu_emulate_opregion_request()
