Searched refs:vce_states (Results 1 – 14 of 14) sorted by relevance
586 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()588 adev->pm.dpm.vce_states[i].ecclk = in amdgpu_parse_extended_power_table()590 adev->pm.dpm.vce_states[i].clk_idx = in amdgpu_parse_extended_power_table()592 adev->pm.dpm.vce_states[i].pstate = in amdgpu_parse_extended_power_table()991 return &adev->pm.dpm.vce_states[idx]; in amdgpu_get_vce_clock_state()
2222 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()2223 new_rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()2249 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()2250 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()2780 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()2785 adev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()2786 adev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
374 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
936 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()937 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()985 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()986 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()987 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()988 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()5726 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in ci_parse_power_table()5733 adev->pm.dpm.vce_states[i].sclk = sclk; in ci_parse_power_table()5734 adev->pm.dpm.vce_states[i].mclk = mclk; in ci_parse_power_table()
3465 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()3466 rps->ecclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3555 if (sclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3556 sclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3557 if (mclk < adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3558 mclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()7288 clock_array_index = adev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()7295 adev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()7296 adev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
1554 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()1555 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in trinity_apply_state_adjust_rules()1572 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in trinity_apply_state_adjust_rules()1573 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in trinity_apply_state_adjust_rules()1806 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in trinity_parse_power_table()1811 rdev->pm.dpm.vce_states[i].sclk = sclk; in trinity_parse_power_table()1812 rdev->pm.dpm.vce_states[i].mclk = 0; in trinity_parse_power_table()
1123 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()1125 rdev->pm.dpm.vce_states[i].ecclk = in r600_parse_extended_power_table()1127 rdev->pm.dpm.vce_states[i].clk_idx = in r600_parse_extended_power_table()1129 rdev->pm.dpm.vce_states[i].pstate = in r600_parse_extended_power_table()
2154 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()2155 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in kv_apply_state_adjust_rules()2181 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in kv_apply_state_adjust_rules()2182 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in kv_apply_state_adjust_rules()2709 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in kv_parse_power_table()2714 rdev->pm.dpm.vce_states[i].sclk = sclk; in kv_parse_power_table()2715 rdev->pm.dpm.vce_states[i].mclk = 0; in kv_parse_power_table()
3005 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()3006 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in si_apply_state_adjust_rules()3095 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in si_apply_state_adjust_rules()3096 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in si_apply_state_adjust_rules()3097 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in si_apply_state_adjust_rules()3098 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in si_apply_state_adjust_rules()6881 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in si_parse_power_table()6888 rdev->pm.dpm.vce_states[i].sclk = sclk; in si_parse_power_table()6889 rdev->pm.dpm.vce_states[i].mclk = mclk; in si_parse_power_table()
804 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()805 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk; in ci_apply_state_adjust_rules()847 if (sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk) in ci_apply_state_adjust_rules()848 sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk; in ci_apply_state_adjust_rules()849 if (mclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk) in ci_apply_state_adjust_rules()850 mclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].mclk; in ci_apply_state_adjust_rules()5617 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx; in ci_parse_power_table()5624 rdev->pm.dpm.vce_states[i].sclk = sclk; in ci_parse_power_table()5625 rdev->pm.dpm.vce_states[i].mclk = mclk; in ci_parse_power_table()
1551 struct radeon_vce_state vce_states[RADEON_MAX_VCE_LEVELS]; member
720 struct amd_vce_state vce_states[AMD_MAX_VCE_LEVELS]; member
833 return &hwmgr->vce_states[idx]; in pp_dpm_get_vce_clock_state()
1332 ppt_get_vce_state_table_entry_v1_0(hwmgr, j, &(hwmgr->vce_states[j]), NULL, &flags); in get_powerplay_table_entry_v1_0()
