Searched refs:timer_reg_base (Results 1 – 2 of 2) sorted by relevance
| /Linux-v4.19/arch/mips/loongson32/common/ |
| D | time.c | 39 static void __iomem *timer_reg_base; variable
44 __raw_writel(period, timer_reg_base + PWM_HRC); in ls1x_pwmtimer_set_period()
45 __raw_writel(period, timer_reg_base + PWM_LRC); in ls1x_pwmtimer_set_period()
50 __raw_writel(0x0, timer_reg_base + PWM_CNT); in ls1x_pwmtimer_restart()
51 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_pwmtimer_restart()
56 timer_reg_base = ioremap_nocache(LS1X_TIMER_BASE, SZ_16); in ls1x_pwmtimer_init()
57 if (!timer_reg_base) in ls1x_pwmtimer_init()
90 count = __raw_readl(timer_reg_base + PWM_CNT); in ls1x_clocksource_read()
135 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_set_state_periodic()
144 __raw_writel(INT_EN | CNT_EN, timer_reg_base + PWM_CTRL); in ls1x_clockevent_tick_resume()
[all …]
|
| /Linux-v4.19/drivers/clocksource/ |
| D | tegra20_timer.c | 51 static void __iomem *timer_reg_base; variable
60 writel_relaxed(value, timer_reg_base + (reg))
62 readl_relaxed(timer_reg_base + (reg))
150 return readl(timer_reg_base + TIMERUS_CNTR_1US); in tegra_delay_timer_read_counter_long()
174 timer_reg_base = of_iomap(np, 0); in tegra20_init_timer()
175 if (!timer_reg_base) { in tegra20_init_timer()
214 ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, in tegra20_init_timer()
|
