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Searched refs:timer_base (Results 1 – 15 of 15) sorted by relevance

/Linux-v4.19/arch/arm/plat-orion/
Dtime.c51 static void __iomem *timer_base; variable
67 return ~readl(timer_base + TIMER0_VAL_OFF); in orion_read_sched_clock()
96 writel(delta, timer_base + TIMER1_VAL_OFF); in orion_clkevt_next_event()
101 u = readl(timer_base + TIMER_CTRL_OFF); in orion_clkevt_next_event()
103 writel(u, timer_base + TIMER_CTRL_OFF); in orion_clkevt_next_event()
118 u = readl(timer_base + TIMER_CTRL_OFF); in orion_clkevt_shutdown()
119 writel(u & ~TIMER1_EN, timer_base + TIMER_CTRL_OFF); in orion_clkevt_shutdown()
141 writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD_OFF); in orion_clkevt_set_periodic()
142 writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL_OFF); in orion_clkevt_set_periodic()
149 u = readl(timer_base + TIMER_CTRL_OFF); in orion_clkevt_set_periodic()
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/Linux-v4.19/drivers/clocksource/
Dtimer-imx-tpm.c37 static void __iomem *timer_base; variable
45 val = readl(timer_base + TPM_C0SC); in tpm_timer_disable()
47 writel(val, timer_base + TPM_C0SC); in tpm_timer_disable()
55 val = readl(timer_base + TPM_C0SC); in tpm_timer_enable()
58 writel(val, timer_base + TPM_C0SC); in tpm_timer_enable()
63 writel(TPM_STATUS_CH0F, timer_base + TPM_STATUS); in tpm_irq_acknowledge()
70 return readl(timer_base + TPM_CNT); in tpm_read_counter()
91 return clocksource_mmio_init(timer_base + TPM_CNT, "imx-tpm", in tpm_clocksource_init()
103 writel(next, timer_base + TPM_C0V); in tpm_set_next_event()
170 timer_base = of_iomap(np, 0); in tpm_timer_init()
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Dtime-orion.c38 static void __iomem *timer_base; variable
42 return ~readl(timer_base + TIMER0_VAL); in orion_read_timer()
60 return ~readl(timer_base + TIMER0_VAL); in orion_read_sched_clock()
72 writel(delta, timer_base + TIMER1_VAL); in orion_clkevt_next_event()
73 atomic_io_modify(timer_base + TIMER_CTRL, in orion_clkevt_next_event()
82 atomic_io_modify(timer_base + TIMER_CTRL, in orion_clkevt_shutdown()
90 writel(ticks_per_jiffy - 1, timer_base + TIMER1_RELOAD); in orion_clkevt_set_periodic()
91 writel(ticks_per_jiffy - 1, timer_base + TIMER1_VAL); in orion_clkevt_set_periodic()
92 atomic_io_modify(timer_base + TIMER_CTRL, in orion_clkevt_set_periodic()
130 timer_base = of_iomap(np, 0); in orion_timer_init()
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Dmeson6_timer.c39 static void __iomem *timer_base; variable
43 return (u64)readl(timer_base + TIMER_ISA_VAL(CSD_ID)); in meson6_timer_sched_read()
48 u32 val = readl(timer_base + TIMER_ISA_MUX); in meson6_clkevt_time_stop()
50 writel(val & ~TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX); in meson6_clkevt_time_stop()
55 writel(delay, timer_base + TIMER_ISA_VAL(timer)); in meson6_clkevt_time_setup()
60 u32 val = readl(timer_base + TIMER_ISA_MUX); in meson6_clkevt_time_start()
67 writel(val | TIMER_ENABLE_BIT(timer), timer_base + TIMER_ISA_MUX); in meson6_clkevt_time_start()
134 timer_base = of_io_request_and_map(node, 0, "meson6-timer"); in meson6_timer_init()
135 if (IS_ERR(timer_base)) { in meson6_timer_init()
147 val = readl(timer_base + TIMER_ISA_MUX); in meson6_timer_init()
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Dtime-armada-370-xp.c79 static void __iomem *timer_base, *local_base; variable
99 return ~readl(timer_base + TIMER0_VAL_OFF); in armada_370_xp_read_sched_clock()
216 timer0_ctrl_reg = readl(timer_base + TIMER_CTRL_OFF); in armada_370_xp_timer_suspend()
223 writel(0xffffffff, timer_base + TIMER0_VAL_OFF); in armada_370_xp_timer_resume()
224 writel(0xffffffff, timer_base + TIMER0_RELOAD_OFF); in armada_370_xp_timer_resume()
225 writel(timer0_ctrl_reg, timer_base + TIMER_CTRL_OFF); in armada_370_xp_timer_resume()
236 return ~readl(timer_base + TIMER0_VAL_OFF); in armada_370_delay_timer_read()
248 timer_base = of_iomap(np, 0); in armada_370_xp_timer_common_init()
249 if (!timer_base) { in armada_370_xp_timer_common_init()
267 atomic_io_modify(timer_base + TIMER_CTRL_OFF, clr | set, set); in armada_370_xp_timer_common_init()
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Dpxa_timer.c55 #define timer_readl(reg) readl_relaxed(timer_base + (reg))
56 #define timer_writel(val, reg) writel_relaxed((val), timer_base + (reg))
58 static void __iomem *timer_base; variable
173 ret = clocksource_mmio_init(timer_base + OSCR, "oscr0", clock_tick_rate, 200, in pxa_timer_common_init()
192 timer_base = of_iomap(np, 0); in pxa_timer_dt_init()
193 if (!timer_base) { in pxa_timer_dt_init()
228 timer_base = base; in pxa_timer_nodt_init()
Dvf_pit_timer.c162 void __iomem *timer_base; in pit_timer_init() local
166 timer_base = of_iomap(np, 0); in pit_timer_init()
167 if (!timer_base) { in pit_timer_init()
177 clksrc_base = timer_base + PITn_OFFSET(2); in pit_timer_init()
178 clkevt_base = timer_base + PITn_OFFSET(3); in pit_timer_init()
196 __raw_writel(~PITMCR_MDIS, timer_base + PITMCR); in pit_timer_init()
Dbcm_kona_timer.c70 kona_timer_get_counter(void __iomem *timer_base, uint32_t *msw, uint32_t *lsw) in kona_timer_get_counter() argument
87 *msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET); in kona_timer_get_counter()
88 *lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET); in kona_timer_get_counter()
89 if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET)) in kona_timer_get_counter()
Dtimer-sun5i.c330 void __iomem *timer_base; in sun5i_timer_init() local
334 timer_base = of_io_request_and_map(node, 0, of_node_full_name(node)); in sun5i_timer_init()
335 if (IS_ERR(timer_base)) { in sun5i_timer_init()
337 return PTR_ERR(timer_base); in sun5i_timer_init()
356 ret = sun5i_setup_clocksource(node, timer_base, clk, irq); in sun5i_timer_init()
360 return sun5i_setup_clockevent(node, timer_base, clk, irq); in sun5i_timer_init()
/Linux-v4.19/kernel/time/
Dtimer.c197 struct timer_base { struct
209 static DEFINE_PER_CPU(struct timer_base, timer_bases[NR_BASES]); argument
534 static void enqueue_timer(struct timer_base *base, struct timer_list *timer, in enqueue_timer()
543 __internal_add_timer(struct timer_base *base, struct timer_list *timer) in __internal_add_timer()
552 trigger_dyntick_cpu(struct timer_base *base, struct timer_list *timer) in trigger_dyntick_cpu()
588 internal_add_timer(struct timer_base *base, struct timer_list *timer) in internal_add_timer()
823 static int detach_if_pending(struct timer_list *timer, struct timer_base *base, in detach_if_pending()
838 static inline struct timer_base *get_timer_cpu_base(u32 tflags, u32 cpu) in get_timer_cpu_base()
840 struct timer_base *base = per_cpu_ptr(&timer_bases[BASE_STD], cpu); in get_timer_cpu_base()
851 static inline struct timer_base *get_timer_this_cpu_base(u32 tflags) in get_timer_this_cpu_base()
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/Linux-v4.19/sound/pci/ctxfi/
Dcttimer.c35 struct ct_timer *timer_base; member
294 struct ct_timer *atimer = ti->timer_base; in ct_xfitimer_start()
309 struct ct_timer *atimer = ti->timer_base; in ct_xfitimer_stop()
347 ti->timer_base = atimer; in ct_timer_instance_new()
362 if (ti->timer_base->ops->prepare) in ct_timer_prepare()
363 ti->timer_base->ops->prepare(ti); in ct_timer_prepare()
370 struct ct_timer *atimer = ti->timer_base; in ct_timer_start()
376 struct ct_timer *atimer = ti->timer_base; in ct_timer_stop()
382 struct ct_timer *atimer = ti->timer_base; in ct_timer_instance_free()
/Linux-v4.19/arch/arm/plat-orion/include/plat/
Dtime.h14 void orion_time_set_base(void __iomem *timer_base);
/Linux-v4.19/drivers/staging/comedi/drivers/
Ddt3000.c342 static int dt3k_ns_to_timer(unsigned int timer_base, unsigned int *nanosec, in dt3k_ns_to_timer() argument
351 base = timer_base * (prescale + 1); in dt3k_ns_to_timer()
371 base = timer_base * (1 << prescale); in dt3k_ns_to_timer()
Daddi_apci_3120.c275 unsigned int timer_base = devpriv->osc_base * prescale; in apci3120_ns_to_timer() local
280 divisor = DIV_ROUND_UP(ns, timer_base); in apci3120_ns_to_timer()
283 divisor = ns / timer_base; in apci3120_ns_to_timer()
287 divisor = DIV_ROUND_CLOSEST(ns, timer_base); in apci3120_ns_to_timer()
Dme4000.c1208 unsigned long timer_base = pci_resource_start(pcidev, 3); in me4000_auto_attach() local
1210 if (!timer_base) in me4000_auto_attach()
1213 dev->pacer = comedi_8254_init(timer_base, 0, I8254_IO8, 0); in me4000_auto_attach()