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Searched refs:set_rate (Results 1 – 25 of 214) sorted by relevance

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/Linux-v4.19/arch/arm/mach-omap1/
Dclock_data.c116 .set_rate = &omap1_set_sossi_rate,
126 .set_rate = omap1_clk_set_rate_ckctl_arm,
140 .set_rate = omap1_clk_set_rate_ckctl_arm,
220 .set_rate = omap1_clk_set_rate_ckctl_arm,
230 .set_rate = omap1_clk_set_rate_ckctl_arm,
242 .set_rate = &omap1_clk_set_rate_dsp_domain,
272 .set_rate = omap1_clk_set_rate_ckctl_arm,
393 .set_rate = omap1_clk_set_rate_ckctl_arm,
407 .set_rate = omap1_clk_set_rate_ckctl_arm,
427 .set_rate = &omap1_set_uart_rate,
[all …]
/Linux-v4.19/arch/arm/mach-ep93xx/
Dclock.c39 int (*set_rate)(struct clk *clk, unsigned long rate); member
99 .set_rate = set_keytchclk_rate,
106 .set_rate = set_keytchclk_rate,
121 .set_rate = set_div_rate,
128 .set_rate = set_div_rate,
136 .set_rate = set_i2s_sclk_rate,
144 .set_rate = set_i2s_lrclk_rate,
479 if (clk->set_rate) in clk_set_rate()
480 return clk->set_rate(clk, rate); in clk_set_rate()
/Linux-v4.19/drivers/clk/
Dclk-composite.c151 return rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate()
171 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
175 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
269 if (rate_ops->set_rate) { in clk_hw_register_composite()
271 clk_composite_ops->set_rate = in clk_hw_register_composite()
283 if (mux_ops->set_parent && rate_ops->set_rate) in clk_hw_register_composite()
/Linux-v4.19/drivers/clk/ti/
Ddpll.c37 .set_rate = &omap3_noncore_dpll_set_rate,
60 .set_rate = &omap3_noncore_dpll_set_rate,
71 .set_rate = &omap3_noncore_dpll_set_rate,
88 .set_rate = &omap2_reprogram_dpllcore,
110 .set_rate = &omap3_noncore_dpll_set_rate,
122 .set_rate = &omap3_dpll5_set_rate,
134 .set_rate = &omap3_dpll4_set_rate,
/Linux-v4.19/drivers/clk/actions/
Dowl-composite.c157 .set_rate = owl_comp_div_set_rate,
174 .set_rate = owl_comp_fact_set_rate,
186 .set_rate = owl_comp_fix_fact_set_rate,
/Linux-v4.19/drivers/clk/st/
Dclk-flexgen.c176 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
177 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
179 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
180 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
194 .set_rate = flexgen_set_rate,
/Linux-v4.19/drivers/sh/clk/
Dcpg.c197 .set_rate = sh_clk_div_set_rate,
203 .set_rate = sh_clk_div_set_rate,
330 .set_rate = sh_clk_div_set_rate,
382 .set_rate = sh_clk_div_set_rate,
462 .set_rate = fsidiv_set_rate,
Dcore.c490 if (likely(clk->ops && clk->ops->set_rate)) { in clk_set_rate()
491 ret = clk->ops->set_rate(clk, rate); in clk_set_rate()
583 if (likely(clkp->ops->set_rate)) in clks_core_resume()
584 clkp->ops->set_rate(clkp, rate); in clks_core_resume()
/Linux-v4.19/drivers/clk/mvebu/
Dclk-corediv.c204 .set_rate = clk_corediv_set_rate,
220 .set_rate = clk_corediv_set_rate,
233 .set_rate = clk_corediv_set_rate,
245 .set_rate = clk_corediv_set_rate,
/Linux-v4.19/drivers/clk/mxs/
Dclk-div.c63 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
73 .set_rate = clk_div_set_rate,
/Linux-v4.19/arch/mips/loongson64/lemote-2f/
Dclock.c102 if (likely(clk->ops && clk->ops->set_rate)) { in clk_set_rate()
106 ret = clk->ops->set_rate(clk, rate, 0); in clk_set_rate()
/Linux-v4.19/arch/sh/kernel/cpu/sh4/
Dclock-sh4-202.c84 if (clk->ops->set_rate(clk, clk->parent->rate / divisor) == 0) in shoc_clk_init()
136 .set_rate = shoc_clk_set_rate,
/Linux-v4.19/drivers/clk/tegra/
Dclk-periph.c79 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
118 .set_rate = clk_periph_set_rate,
137 .set_rate = clk_periph_set_rate,
/Linux-v4.19/drivers/clk/qcom/
Dclk-rcg2.c347 .set_rate = clk_rcg2_set_rate,
358 .set_rate = clk_rcg2_set_floor_rate,
484 .set_rate = clk_edp_pixel_set_rate,
542 .set_rate = clk_byte_set_rate,
612 .set_rate = clk_byte2_set_rate,
702 .set_rate = clk_pixel_set_rate,
789 .set_rate = clk_gfx3d_set_rate,
928 .set_rate = clk_rcg2_shared_set_rate,
Dclk-rcg.c823 .set_rate = clk_rcg_set_rate,
834 .set_rate = clk_rcg_bypass_set_rate,
845 .set_rate = clk_rcg_bypass2_set_rate,
857 .set_rate = clk_rcg_pixel_set_rate,
869 .set_rate = clk_rcg_esc_set_rate,
881 .set_rate = clk_rcg_lcc_set_rate,
893 .set_rate = clk_dyn_rcg_set_rate,
/Linux-v4.19/drivers/clk/ux500/
Dclk-prcmu.c198 .set_rate = clk_prcmu_set_rate,
215 .set_rate = clk_prcmu_set_rate,
242 .set_rate = clk_prcmu_set_rate,
/Linux-v4.19/drivers/clk/samsung/
Dclk-pll.c258 .set_rate = samsung_pll35xx_set_rate,
374 .set_rate = samsung_pll36xx_set_rate,
513 .set_rate = samsung_pll45xx_set_rate,
672 .set_rate = samsung_pll46xx_set_rate,
901 .set_rate = samsung_s3c2410_pll_set_rate,
909 .set_rate = samsung_s3c2410_pll_set_rate,
917 .set_rate = samsung_s3c2410_pll_set_rate,
1053 .set_rate = samsung_pll2550xx_set_rate,
1149 .set_rate = samsung_pll2650x_set_rate,
1243 .set_rate = samsung_pll2650xx_set_rate,
/Linux-v4.19/drivers/clk/imx/
Dclk-pllv3.c160 .set_rate = clk_pllv3_set_rate,
215 .set_rate = clk_pllv3_sys_set_rate,
304 .set_rate = clk_pllv3_av_set_rate,
397 .set_rate = clk_pllv3_vf610_set_rate,
Dclk-busy.c68 ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); in clk_busy_divider_set_rate()
78 .set_rate = clk_busy_divider_set_rate,
/Linux-v4.19/include/linux/qed/
Dqed_iov_if.h54 int (*set_rate) (struct qed_dev *cdev, int vfid, member
/Linux-v4.19/arch/mips/include/asm/
Dclock.h17 int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id); member
/Linux-v4.19/sound/usb/6fire/
Dcontrol.h35 int (*set_rate)(struct control_runtime *rt, int rate); member
/Linux-v4.19/drivers/staging/clocking-wizard/
DTODO4 - support for set_rate() operations (may benefit from Stephen Boyd's
/Linux-v4.19/drivers/clk/at91/
Dclk-usb.c156 .set_rate = at91sam9x5_clk_usb_set_rate,
192 .set_rate = at91sam9x5_clk_usb_set_rate,
342 .set_rate = at91rm9200_clk_usb_set_rate,
/Linux-v4.19/drivers/clk/sprd/
Dcomposite.c58 .set_rate = sprd_comp_set_rate,

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