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Searched refs:radeon_crtc (Results 1 – 25 of 32) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/radeon/
Dradeon_cursor.c33 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_lock_cursor() local
37 cur_lock = RREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
42 WREG32(EVERGREEN_CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
44 cur_lock = RREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset); in radeon_lock_cursor()
49 WREG32(AVIVO_D1CUR_UPDATE + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
51 cur_lock = RREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset); in radeon_lock_cursor()
56 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, cur_lock); in radeon_lock_cursor()
62 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_hide_cursor() local
66 WREG32_IDX(EVERGREEN_CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
70 WREG32_IDX(AVIVO_D1CUR_CONTROL + radeon_crtc->crtc_offset, in radeon_hide_cursor()
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Datombios_crtc.c41 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_overscan_setup() local
48 args.ucCRTC = radeon_crtc->crtc_id; in atombios_overscan_setup()
50 switch (radeon_crtc->rmx_type) { in atombios_overscan_setup()
71 args.usOverscanRight = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
72 args.usOverscanLeft = cpu_to_le16(radeon_crtc->h_border); in atombios_overscan_setup()
73 args.usOverscanBottom = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
74 args.usOverscanTop = cpu_to_le16(radeon_crtc->v_border); in atombios_overscan_setup()
84 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in atombios_scaler_setup() local
88 to_radeon_encoder(radeon_crtc->encoder); in atombios_scaler_setup()
93 if (!ASIC_IS_AVIVO(rdev) && radeon_crtc->crtc_id) in atombios_scaler_setup()
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Dradeon_display.c44 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in avivo_crtc_load_lut() local
50 DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); in avivo_crtc_load_lut()
51 WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
53 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
54 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
55 WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); in avivo_crtc_load_lut()
57 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
58 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
59 WREG32(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0xffff); in avivo_crtc_load_lut()
61 WREG32(AVIVO_DC_LUT_RW_SELECT, radeon_crtc->crtc_id); in avivo_crtc_load_lut()
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Dradeon_legacy_crtc.c39 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_overscan_setup() local
41 WREG32(RADEON_OVR_CLR + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
42 WREG32(RADEON_OVR_WID_LEFT_RIGHT + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
43 WREG32(RADEON_OVR_WID_TOP_BOTTOM + radeon_crtc->crtc_offset, 0); in radeon_overscan_setup()
51 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_legacy_rmx_mode_set() local
63 struct drm_display_mode *native_mode = &radeon_crtc->native_mode; in radeon_legacy_rmx_mode_set()
126 switch (radeon_crtc->rmx_type) { in radeon_legacy_rmx_mode_set()
296 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_crtc_dpms() local
302 if (radeon_crtc->crtc_id) in radeon_crtc_dpms()
324 radeon_crtc->enabled = true; in radeon_crtc_dpms()
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Drs600.c115 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip() local
116 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rs600_page_flip()
121 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
124 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rs600_page_flip()
126 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
128 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rs600_page_flip()
133 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rs600_page_flip()
141 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rs600_page_flip()
146 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rs600_page_flip_pending() local
149 return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & in rs600_page_flip_pending()
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Dradeon_legacy_encoders.c183 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_lvds_mode_set() local
221 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_lvds_mode_set()
242 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
244 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_lvds_mode_set()
584 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_primary_dac_mode_set() local
590 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_primary_dac_mode_set()
630 radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
632 radeon_combios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id); in radeon_legacy_primary_dac_mode_set()
781 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tmds_int_mode_set() local
848 if (radeon_crtc->crtc_id == 0) { in radeon_legacy_tmds_int_mode_set()
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Dradeon_legacy_tv.c240 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_get_std_mode() local
245 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_get_std_mode()
246 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_get_std_mode()
428 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_init_restarts() local
437 radeon_crtc = to_radeon_crtc(radeon_encoder->base.crtc); in radeon_legacy_tv_init_restarts()
438 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_init_restarts()
541 struct radeon_crtc *radeon_crtc; in radeon_legacy_tv_mode_set() local
558 radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_legacy_tv_mode_set()
604 if (radeon_crtc->crtc_id == 1) in radeon_legacy_tv_mode_set()
607 if (radeon_crtc->rmx_type != RMX_OFF) in radeon_legacy_tv_mode_set()
Dradeon_dp_mst.c360 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_dp_mst_prepare_pll() local
363 struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder); in radeon_dp_mst_prepare_pll()
372 radeon_crtc->bpc = radeon_connector->base.display_info.bpc; in radeon_dp_mst_prepare_pll()
374 radeon_crtc->bpc = 8; in radeon_dp_mst_prepare_pll()
379 radeon_crtc->ss_enabled = in radeon_dp_mst_prepare_pll()
380 radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss, in radeon_dp_mst_prepare_pll()
395 struct radeon_crtc *radeon_crtc; in radeon_mst_encoder_dpms() local
422 radeon_crtc = to_radeon_crtc(crtc); in radeon_mst_encoder_dpms()
439 mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id); in radeon_mst_encoder_dpms()
447 dig_enc->linkb, radeon_crtc->crtc_id); in radeon_mst_encoder_dpms()
Datombios_encoders.c460 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_atom_get_bpc() local
461 bpc = radeon_crtc->bpc; in radeon_atom_get_bpc()
1054 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_dig_transmitter_setup2() local
1055 pll_id = radeon_crtc->pll_id; in atombios_dig_transmitter_setup2()
1542 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_yuv_setup() local
1558 (radeon_crtc->crtc_id << 18))); in atombios_yuv_setup()
1560 WREG32(reg, (ATOM_S3_CV_ACTIVE | (radeon_crtc->crtc_id << 24))); in atombios_yuv_setup()
1566 args.ucCRTC = radeon_crtc->crtc_id; in atombios_yuv_setup()
1865 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in atombios_set_encoder_crtc_source() local
1882 args.v1.ucCRTC = radeon_crtc->crtc_id; in atombios_set_encoder_crtc_source()
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Dradeon_audio.c67 struct radeon_crtc *crtc, unsigned int clock);
69 struct radeon_crtc *crtc, unsigned int clock);
71 struct radeon_crtc *crtc, unsigned int clock);
73 struct radeon_crtc *crtc, unsigned int clock);
75 struct radeon_crtc *crtc, unsigned int clock);
77 struct radeon_crtc *crtc, unsigned int clock);
499 struct radeon_crtc *crtc = to_radeon_crtc(encoder->crtc); in radeon_audio_set_dto()
661 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in radeon_hdmi_set_color_depth() local
662 bpc = radeon_crtc->bpc; in radeon_hdmi_set_color_depth()
Devergreen.c1296 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in dce4_program_fmt() local
1344 WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp); in dce4_program_fmt()
1417 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in evergreen_page_flip() local
1420 WREG32(EVERGREEN_GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in evergreen_page_flip()
1422 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + radeon_crtc->crtc_offset, in evergreen_page_flip()
1424 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in evergreen_page_flip()
1427 RREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset); in evergreen_page_flip()
1440 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in evergreen_page_flip_pending() local
1443 return !!(RREG32(EVERGREEN_GRPH_UPDATE + radeon_crtc->crtc_offset) & in evergreen_page_flip_pending()
1671 struct radeon_crtc *radeon_crtc; in evergreen_pm_prepare() local
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Dradeon_mode.h46 #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
247 struct radeon_crtc *crtcs[RADEON_MAX_CRTCS];
327 struct radeon_crtc { struct
937 struct radeon_crtc *radeon_crtc);
939 struct radeon_crtc *radeon_crtc);
954 void atom_rv515_force_tv_scaler(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc);
Devergreen_hdmi.c75 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in evergreen_hdmi_update_acr() local
76 bpc = radeon_crtc->bpc; in evergreen_hdmi_update_acr()
228 struct radeon_crtc *crtc, unsigned int clock) in dce4_hdmi_audio_set_dto()
271 struct radeon_crtc *crtc, unsigned int clock) in dce4_dp_audio_set_dto()
Dr600_dpm.c161 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vblank_time() local
167 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vblank_time()
168 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { in r600_dpm_get_vblank_time()
170 radeon_crtc->hw_mode.crtc_htotal * in r600_dpm_get_vblank_time()
171 (radeon_crtc->hw_mode.crtc_vblank_end - in r600_dpm_get_vblank_time()
172 radeon_crtc->hw_mode.crtc_vdisplay + in r600_dpm_get_vblank_time()
173 (radeon_crtc->v_border * 2)); in r600_dpm_get_vblank_time()
175 vblank_time_us = vblank_in_pixels * 1000 / radeon_crtc->hw_mode.clock; in r600_dpm_get_vblank_time()
188 struct radeon_crtc *radeon_crtc; in r600_dpm_get_vrefresh() local
193 radeon_crtc = to_radeon_crtc(crtc); in r600_dpm_get_vrefresh()
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Drv770.c806 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip() local
807 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset); in rv770_page_flip()
812 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
815 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset, in rv770_page_flip()
817 if (radeon_crtc->crtc_id) { in rv770_page_flip()
824 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
826 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, in rv770_page_flip()
831 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING) in rv770_page_flip()
839 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp); in rv770_page_flip()
844 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in rv770_page_flip_pending() local
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Dradeon_device.c1593 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_suspend_kms() local
1597 if (radeon_crtc->cursor_bo) { in radeon_suspend_kms()
1598 struct radeon_bo *robj = gem_to_radeon_bo(radeon_crtc->cursor_bo); in radeon_suspend_kms()
1716 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_resume_kms() local
1718 if (radeon_crtc->cursor_bo) { in radeon_resume_kms()
1719 struct radeon_bo *robj = gem_to_radeon_bo(radeon_crtc->cursor_bo); in radeon_resume_kms()
1727 &radeon_crtc->cursor_addr); in radeon_resume_kms()
Dr100.c158 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip() local
164 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
168 if (RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & RADEON_CRTC_OFFSET__GUI_TRIG_OFFSET) in r100_page_flip()
176 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, tmp); in r100_page_flip()
191 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id]; in r100_page_flip_pending() local
194 return !!(RREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset) & in r100_page_flip_pending()
447 struct radeon_crtc *radeon_crtc; in r100_pm_prepare() local
452 radeon_crtc = to_radeon_crtc(crtc); in r100_pm_prepare()
453 if (radeon_crtc->enabled) { in r100_pm_prepare()
454 if (radeon_crtc->crtc_id) { in r100_pm_prepare()
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Ddce6_afmt.c269 struct radeon_crtc *crtc, unsigned int clock) in dce6_hdmi_audio_set_dto()
288 struct radeon_crtc *crtc, unsigned int clock) in dce6_dp_audio_set_dto()
Dsi.c1968 struct radeon_crtc *radeon_crtc, in dce6_line_buffer_adjust() argument
1973 u32 pipe_offset = radeon_crtc->crtc_id * 0x20; in dce6_line_buffer_adjust()
1987 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
2000 WREG32(DC_LB_MEMORY_SPLIT + radeon_crtc->crtc_offset, in dce6_line_buffer_adjust()
2012 if (radeon_crtc->base.enabled && mode) { in dce6_line_buffer_adjust()
2295 struct radeon_crtc *radeon_crtc, in dce6_program_watermarks() argument
2298 struct drm_display_mode *mode = &radeon_crtc->base.mode; in dce6_program_watermarks()
2310 if (radeon_crtc->base.enabled && num_heads && mode) { in dce6_program_watermarks()
2342 wm_high.vsc = radeon_crtc->vsc; in dce6_program_watermarks()
2344 if (radeon_crtc->rmx_type != RMX_OFF) in dce6_program_watermarks()
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Dradeon_audio.h55 struct radeon_crtc *crtc, unsigned int clock);
Dradeon_pm.c1644 struct radeon_crtc *radeon_crtc; in radeon_pm_compute_clocks_old() local
1656 radeon_crtc = to_radeon_crtc(crtc); in radeon_pm_compute_clocks_old()
1657 if (radeon_crtc->enabled) { in radeon_pm_compute_clocks_old()
1658 rdev->pm.active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_old()
1717 struct radeon_crtc *radeon_crtc; in radeon_pm_compute_clocks_dpm() local
1730 radeon_crtc = to_radeon_crtc(crtc); in radeon_pm_compute_clocks_dpm()
1732 rdev->pm.dpm.new_active_crtcs |= (1 << radeon_crtc->crtc_id); in radeon_pm_compute_clocks_dpm()
Dcik.c8745 struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc); in dce8_program_fmt() local
8801 WREG32(FMT_BIT_DEPTH_CONTROL + radeon_crtc->crtc_offset, tmp); in dce8_program_fmt()
8818 struct radeon_crtc *radeon_crtc, in dce8_line_buffer_adjust() argument
8822 u32 pipe_offset = radeon_crtc->crtc_id * 0x20; in dce8_line_buffer_adjust()
8831 if (radeon_crtc->base.enabled && mode) { in dce8_line_buffer_adjust()
8851 WREG32(LB_MEMORY_CTRL + radeon_crtc->crtc_offset, in dce8_line_buffer_adjust()
8863 if (radeon_crtc->base.enabled && mode) { in dce8_line_buffer_adjust()
9247 struct radeon_crtc *radeon_crtc, in dce8_program_watermarks() argument
9250 struct drm_display_mode *mode = &radeon_crtc->base.mode; in dce8_program_watermarks()
9257 if (radeon_crtc->base.enabled && num_heads && mode) { in dce8_program_watermarks()
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Ddce3_1_afmt.c117 struct radeon_crtc *crtc, unsigned int clock) in dce3_2_audio_set_dto()
Drs780_dpm.c53 struct radeon_crtc *radeon_crtc; in rs780_get_pm_mode_parameters() local
63 radeon_crtc = to_radeon_crtc(crtc); in rs780_get_pm_mode_parameters()
64 pi->crtc_id = radeon_crtc->crtc_id; in rs780_get_pm_mode_parameters()
Dradeon_kms.c276 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); in radeon_info_ioctl() local
277 *value = radeon_crtc->crtc_id; in radeon_info_ioctl()

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