Searched refs:psr_vsc (Results 1 – 2 of 2) sorted by relevance
249 struct edp_vsc_psr psr_vsc; in intel_psr_setup_vsc() local253 memset(&psr_vsc, 0, sizeof(psr_vsc)); in intel_psr_setup_vsc()254 psr_vsc.sdp_header.HB0 = 0; in intel_psr_setup_vsc()255 psr_vsc.sdp_header.HB1 = 0x7; in intel_psr_setup_vsc()257 psr_vsc.sdp_header.HB2 = 0x5; in intel_psr_setup_vsc()258 psr_vsc.sdp_header.HB3 = 0x13; in intel_psr_setup_vsc()260 psr_vsc.sdp_header.HB2 = 0x4; in intel_psr_setup_vsc()261 psr_vsc.sdp_header.HB3 = 0xe; in intel_psr_setup_vsc()265 memset(&psr_vsc, 0, sizeof(psr_vsc)); in intel_psr_setup_vsc()266 psr_vsc.sdp_header.HB0 = 0; in intel_psr_setup_vsc()[all …]
118 struct edp_vsc_psr psr_vsc; in analogix_dp_enable_psr() local124 memset(&psr_vsc, 0, sizeof(psr_vsc)); in analogix_dp_enable_psr()125 psr_vsc.sdp_header.HB0 = 0; in analogix_dp_enable_psr()126 psr_vsc.sdp_header.HB1 = 0x7; in analogix_dp_enable_psr()127 psr_vsc.sdp_header.HB2 = 0x2; in analogix_dp_enable_psr()128 psr_vsc.sdp_header.HB3 = 0x8; in analogix_dp_enable_psr()130 psr_vsc.DB0 = 0; in analogix_dp_enable_psr()131 psr_vsc.DB1 = EDP_VSC_PSR_STATE_ACTIVE | EDP_VSC_PSR_CRC_VALUES_VALID; in analogix_dp_enable_psr()133 return analogix_dp_send_psr_spd(dp, &psr_vsc, true); in analogix_dp_enable_psr()139 struct edp_vsc_psr psr_vsc; in analogix_dp_disable_psr() local[all …]
