Searched refs:pp_display_cfg (Results 1 – 8 of 8) sorted by relevance
40 const struct dm_pp_display_configuration *pp_display_cfg) in dm_pp_apply_display_requirements() argument51 pp_display_cfg->cpu_cc6_disable; in dm_pp_apply_display_requirements()54 pp_display_cfg->cpu_pstate_disable; in dm_pp_apply_display_requirements()57 pp_display_cfg->cpu_pstate_separation_time; in dm_pp_apply_display_requirements()60 pp_display_cfg->nb_pstate_switch_disable; in dm_pp_apply_display_requirements()63 pp_display_cfg->display_count; in dm_pp_apply_display_requirements()65 pp_display_cfg->display_count; in dm_pp_apply_display_requirements()68 pp_display_cfg->min_engine_clock_khz/10; in dm_pp_apply_display_requirements()70 pp_display_cfg->min_engine_clock_deep_sleep_khz/10; in dm_pp_apply_display_requirements()72 pp_display_cfg->min_memory_clock_khz/10; in dm_pp_apply_display_requirements()[all …]
112 struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg; in dce100_pplib_apply_display_requirements() local114 pp_display_cfg->avail_mclk_switch_time_us = in dce100_pplib_apply_display_requirements()119 dce110_fill_display_configs(context, pp_display_cfg); in dce100_pplib_apply_display_requirements()121 if (memcmp(&dc->prev_display_config, pp_display_cfg, sizeof( in dce100_pplib_apply_display_requirements()123 dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); in dce100_pplib_apply_display_requirements()125 dc->prev_display_config = *pp_display_cfg; in dce100_pplib_apply_display_requirements()
2408 struct dm_pp_display_configuration *pp_display_cfg) in dce110_fill_display_configs() argument2418 &pp_display_cfg->disp_configs[num_cfgs]; in dce110_fill_display_configs()2456 pp_display_cfg->display_count = num_cfgs; in dce110_fill_display_configs()2513 struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg; in pplib_apply_display_requirements() local2515 pp_display_cfg->all_displays_in_sync = in pplib_apply_display_requirements()2517 pp_display_cfg->nb_pstate_switch_disable = in pplib_apply_display_requirements()2519 pp_display_cfg->cpu_cc6_disable = in pplib_apply_display_requirements()2521 pp_display_cfg->cpu_pstate_disable = in pplib_apply_display_requirements()2523 pp_display_cfg->cpu_pstate_separation_time = in pplib_apply_display_requirements()2526 pp_display_cfg->min_memory_clock_khz = context->bw.dce.yclk_khz in pplib_apply_display_requirements()[all …]
69 struct dm_pp_display_configuration *pp_display_cfg);
36 struct dm_pp_display_configuration *pp_display_cfg);
2220 struct dm_pp_display_configuration *pp_display_cfg = &context->pp_display_cfg; in dcn10_pplib_apply_display_requirements() local2222 pp_display_cfg->min_engine_clock_khz = dc->res_pool->dccg->clks.dcfclk_khz; in dcn10_pplib_apply_display_requirements()2223 pp_display_cfg->min_memory_clock_khz = dc->res_pool->dccg->clks.fclk_khz; in dcn10_pplib_apply_display_requirements()2224 pp_display_cfg->min_engine_clock_deep_sleep_khz = dc->res_pool->dccg->clks.dcfclk_deep_sleep_khz; in dcn10_pplib_apply_display_requirements()2225 pp_display_cfg->min_dcfc_deep_sleep_clock_khz = dc->res_pool->dccg->clks.dcfclk_deep_sleep_khz; in dcn10_pplib_apply_display_requirements()2226 pp_display_cfg->min_dcfclock_khz = dc->res_pool->dccg->clks.dcfclk_khz; in dcn10_pplib_apply_display_requirements()2227 pp_display_cfg->disp_clk_khz = dc->res_pool->dccg->clks.dispclk_khz; in dcn10_pplib_apply_display_requirements()2228 dce110_fill_display_configs(context, pp_display_cfg); in dcn10_pplib_apply_display_requirements()2230 if (memcmp(&dc->prev_display_config, pp_display_cfg, sizeof( in dcn10_pplib_apply_display_requirements()2232 dm_pp_apply_display_requirements(dc->ctx, pp_display_cfg); in dcn10_pplib_apply_display_requirements()[all …]
279 struct dm_pp_display_configuration pp_display_cfg; member
238 const struct dm_pp_display_configuration *pp_display_cfg);
