Searched refs:phy_cmn_mmio (Results 1 – 2 of 2) sorted by relevance
91 void __iomem *phy_cmn_mmio; member361 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_disable_pll_bias()364 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_disable_pll_bias()371 u32 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0); in dsi_pll_enable_pll_bias()373 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CTRL_0, in dsi_pll_enable_pll_bias()383 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_disable_global_clk()384 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, in dsi_pll_disable_global_clk()392 data = pll_read(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1); in dsi_pll_enable_global_clk()393 pll_write(pll->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_CLK_CFG1, in dsi_pll_enable_global_clk()408 pll_write(pll_10nm->phy_cmn_mmio + REG_DSI_10nm_PHY_CMN_PLL_CNTRL, in dsi_pll_10nm_vco_prepare()[all …]
131 void __iomem *phy_cmn_mmio; member499 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in pll_14nm_software_reset()519 void __iomem *cmn_base = pll->phy_cmn_mmio; in pll_db_commit_14nm()690 void __iomem *base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_postdiv_recalc_rate()723 void __iomem *base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_postdiv_set_rate()750 void __iomem *slave_base = pll_14nm_slave->phy_cmn_mmio; in dsi_pll_14nm_postdiv_set_rate()774 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_enable_seq()796 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_disable_seq()807 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_save_state()825 void __iomem *cmn_base = pll_14nm->phy_cmn_mmio; in dsi_pll_14nm_restore_state()[all …]
