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Searched refs:mmUVD_VCPU_CNTL (Results 1 – 11 of 11) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h94 #define mmUVD_VCPU_CNTL 0x3D98 macro
Duvd_4_2_d.h66 #define mmUVD_VCPU_CNTL 0x3d98 macro
Duvd_5_0_d.h72 #define mmUVD_VCPU_CNTL 0x3d98 macro
Duvd_6_0_d.h88 #define mmUVD_VCPU_CNTL 0x3d98 macro
Duvd_7_0_offset.h188 #define mmUVD_VCPU_CNTL … macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h350 #define mmUVD_VCPU_CNTL … macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Duvd_v4_2.c278 WREG32(mmUVD_VCPU_CNTL, 1 << 9); in uvd_v4_2_start()
429 WREG32_P(mmUVD_VCPU_CNTL, 0, ~(1 << 9)); in uvd_v4_2_stop()
Duvd_v5_0.c354 WREG32(mmUVD_VCPU_CNTL, 1 << 9); in uvd_v5_0_start()
449 WREG32(mmUVD_VCPU_CNTL, 0x0); in uvd_v5_0_stop()
Duvd_v7_0.c878 MMSCH_V1_0_INSERT_DIRECT_WT(SOC15_REG_OFFSET(UVD, i, mmUVD_VCPU_CNTL), in uvd_v7_0_sriov_start()
1009 WREG32_SOC15(UVD, k, mmUVD_VCPU_CNTL, in uvd_v7_0_start()
1136 WREG32_SOC15(UVD, i, mmUVD_VCPU_CNTL, 0x0); in uvd_v7_0_stop()
Duvd_v6_0.c780 WREG32(mmUVD_VCPU_CNTL, UVD_VCPU_CNTL__CLK_EN_MASK); in uvd_v6_0_start()
892 WREG32(mmUVD_VCPU_CNTL, 0x0); in uvd_v6_0_stop()
Dvcn_v1_0.c683 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, in vcn_v1_0_start()
821 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CNTL, 0x0); in vcn_v1_0_stop()