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Searched refs:mmUVD_GPCOM_VCPU_CMD (Results 1 – 13 of 13) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/uvd/
Duvd_4_0_d.h42 #define mmUVD_GPCOM_VCPU_CMD 0x3BC3 macro
Duvd_4_2_d.h30 #define mmUVD_GPCOM_VCPU_CMD 0x3bc3 macro
Duvd_5_0_d.h30 #define mmUVD_GPCOM_VCPU_CMD 0x3bc3 macro
Duvd_6_0_d.h30 #define mmUVD_GPCOM_VCPU_CMD 0x3bc3 macro
Duvd_7_0_offset.h54 #define mmUVD_GPCOM_VCPU_CMD … macro
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dvcn_v1_0.c926 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_insert_start()
942 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_insert_end()
971 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_emit_fence()
981 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_emit_fence()
1030 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_emit_reg_wait()
1061 PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0)); in vcn_v1_0_dec_ring_emit_wreg()
Duvd_v6_0.c919 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v6_0_ring_emit_fence()
926 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v6_0_ring_emit_fence()
1050 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v6_0_ring_emit_wreg()
1065 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v6_0_ring_emit_vm_flush()
1082 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v6_0_ring_emit_pipeline_sync()
Duvd_v4_2.c460 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v4_2_ring_emit_fence()
467 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v4_2_ring_emit_fence()
Duvd_v5_0.c476 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v5_0_ring_emit_fence()
483 amdgpu_ring_write(ring, PACKET0(mmUVD_GPCOM_VCPU_CMD, 0)); in uvd_v5_0_ring_emit_fence()
Duvd_v7_0.c1169 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0)); in uvd_v7_0_ring_emit_fence()
1179 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0)); in uvd_v7_0_ring_emit_fence()
1344 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0)); in uvd_v7_0_ring_emit_wreg()
1363 PACKET0(SOC15_REG_OFFSET(UVD, ring->me, mmUVD_GPCOM_VCPU_CMD), 0)); in uvd_v7_0_ring_emit_reg_wait()
Damdgpu_vcn.c306 ib->ptr[4] = PACKET0(SOC15_REG_OFFSET(UVD, 0, mmUVD_GPCOM_VCPU_CMD), 0); in amdgpu_vcn_dec_send_msg()
Damdgpu_uvd.c910 case mmUVD_GPCOM_VCPU_CMD: in amdgpu_uvd_cs_reg()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/vcn/
Dvcn_1_0_offset.h118 #define mmUVD_GPCOM_VCPU_CMD … macro