Searched refs:mmMC_SEQ_WR_CTL_2_LP (Results 1 – 7 of 7) sorted by relevance
1002 #define mmMC_SEQ_WR_CTL_2_LP 0x0AD6 macro
820 #define mmMC_SEQ_WR_CTL_2_LP 0xad6 macro
924 #define mmMC_SEQ_WR_CTL_2_LP 0xad6 macro
2451 *out_reg = mmMC_SEQ_WR_CTL_2_LP; in iceland_check_s0_mc_reg_index()2630 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in iceland_initialize_mc_reg_table()
2521 *out_reg = mmMC_SEQ_WR_CTL_2_LP; in ci_check_s0_mc_reg_index()2700 …cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in ci_initialize_mc_reg_table()
2902 *out_reg = mmMC_SEQ_WR_CTL_2_LP; in tonga_check_s0_mc_reg_index()3102 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_2_LP, in tonga_initialize_mc_reg_table()
4619 *out_reg = mmMC_SEQ_WR_CTL_2_LP; in ci_check_s0_mc_reg_index()4804 WREG32(mmMC_SEQ_WR_CTL_2_LP, RREG32(mmMC_SEQ_WR_CTL_2)); in ci_initialize_mc_reg_table()