Searched refs:mmCUR_CONTROL (Results 1 – 9 of 9) sorted by relevance
2348 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_hide_cursor()2350 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_hide_cursor()2364 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_show_cursor()2367 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_show_cursor()
2269 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_hide_cursor()2271 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_hide_cursor()2285 tmp = RREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_show_cursor()2288 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_show_cursor()
2172 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_hide_cursor()2187 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v8_0_show_cursor()
2156 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v6_0_hide_cursor()2173 WREG32_IDX(mmCUR_CONTROL + amdgpu_crtc->crtc_offset, in dce_v6_0_show_cursor()
1033 #define mmCUR_CONTROL 0x1A66 macro
2228 #define mmCUR_CONTROL 0x1a66 macro
3077 #define mmCUR_CONTROL 0x1a66 macro
2824 #define mmCUR_CONTROL 0x1a66 macro
4062 #define mmCUR_CONTROL 0x1a66 macro