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Searched refs:mmCP_INT_CNTL_RING1 (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgfx_v6_0.c3275 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING1); in gfx_v6_0_set_compute_eop_interrupt_state()
3277 WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
3288 cp_int_cntl = RREG32(mmCP_INT_CNTL_RING1); in gfx_v6_0_set_compute_eop_interrupt_state()
3290 WREG32(mmCP_INT_CNTL_RING1, cp_int_cntl); in gfx_v6_0_set_compute_eop_interrupt_state()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h439 #define mmCP_INT_CNTL_RING1 0x306B macro
Dgfx_7_0_d.h223 #define mmCP_INT_CNTL_RING1 0x306b macro
Dgfx_7_2_d.h223 #define mmCP_INT_CNTL_RING1 0x306b macro
Dgfx_8_0_d.h247 #define mmCP_INT_CNTL_RING1 0x306b macro
Dgfx_8_1_d.h248 #define mmCP_INT_CNTL_RING1 0x306b macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_offset.h2428 #define mmCP_INT_CNTL_RING1 … macro
Dgc_9_1_offset.h2742 #define mmCP_INT_CNTL_RING1 … macro
Dgc_9_2_1_offset.h2680 #define mmCP_INT_CNTL_RING1 … macro