Searched refs:mclk_div (Results 1 – 10 of 10) sorted by relevance
245 u32 mclk_div = 0; in sun4i_spdif_hw_params() local309 mclk_div = 8; in sun4i_spdif_hw_params()312 mclk_div = 6; in sun4i_spdif_hw_params()316 mclk_div = 4; in sun4i_spdif_hw_params()320 mclk_div = 2; in sun4i_spdif_hw_params()324 mclk_div = 1; in sun4i_spdif_hw_params()334 reg_val |= SUN4I_SPDIF_TXCFG_TXRATIO(mclk_div - 1); in sun4i_spdif_hw_params()
278 int bclk_div, mclk_div; in sun4i_i2s_set_clk_rate() local326 mclk_div = sun4i_i2s_get_mclk_div(i2s, oversample_rate, in sun4i_i2s_set_clk_rate()328 if (mclk_div < 0) { in sun4i_i2s_set_clk_rate()329 dev_err(dai->dev, "Unsupported MCLK divider: %d\n", mclk_div); in sun4i_i2s_set_clk_rate()335 mclk_div += i2s->variant->mclk_offset; in sun4i_i2s_set_clk_rate()339 SUN4I_I2S_CLK_DIV_MCLK(mclk_div)); in sun4i_i2s_set_clk_rate()
67 int mclk_div; member348 unsigned int source, unsigned int mclk_div) in pll_factors() argument361 (mclk_div == post_table[i].mclkdiv)) { in pll_factors()423 wm8804->mclk_div); in wm8804_set_pll()500 wm8804->mclk_div = div; in wm8804_set_clkdiv()
1337 int mclk_div; member1516 (clk_sys_ratios[0].mclk_div * in wm8903_hw_params()1520 (clk_sys_ratios[i].mclk_div * in wm8903_hw_params()1529 if (clk_sys_ratios[clk_config].mclk_div == 2) { in wm8903_hw_params()
581 u8 mclk_div; member638 (pll_ratio_table[i].mclk_div << in cs42l42_pll_config()
21 int mclk_div; /* Clock Divider Value for MCLK */ member
362 mcam->mclk_div = pdata->mclk_div; in mmpcam_probe()
117 int mclk_div; /* Clock Divider Value for MCLK */ member
305 (mcam->mclk_src << 29) | mcam->mclk_div); in mcam_enable_mipi()
84 u_char mclk_div; member515 cyber2000_grphw(EXT_MCLK_DIV, cfb->mclk_div, cfb); in cyber2000fb_set_timing()1769 cfb->mclk_div = cyber2000_grphr(EXT_MCLK_DIV, cfb); in cyberpro_pci_probe()1777 cfb->mclk_div = 0x54; in cyberpro_pci_probe()
