Searched refs:fclks (Results 1 – 1 of 1) sorted by relevance
1347 struct dm_pp_clock_levels_with_voltage fclks = {0}, dcfclks = {0}; in dcn_bw_update_from_pplib() local1354 ctx, DM_PP_CLOCK_TYPE_FCLK, &fclks); in dcn_bw_update_from_pplib()1357 res = verify_clock_values(&fclks); in dcn_bw_update_from_pplib()1360 ASSERT(fclks.num_levels >= 3); in dcn_bw_update_from_pplib()1361 …dc->dcn_soc->fabric_and_dram_bandwidth_vmin0p65 = 32 * (fclks.data[0].clocks_in_khz / 1000.0) / 10… in dcn_bw_update_from_pplib()1363 (fclks.data[fclks.num_levels - (fclks.num_levels > 2 ? 3 : 2)].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib()1366 (fclks.data[fclks.num_levels - 2].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib()1369 (fclks.data[fclks.num_levels - 1].clocks_in_khz / 1000.0) in dcn_bw_update_from_pplib()
