Searched refs:XGMAC_DMA_CH_RX_CONTROL (Results 1 – 2 of 2) sorted by relevance
52 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_init_rx_chan()55 writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_init_rx_chan()237 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_start_rx()239 writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_start_rx()250 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_stop_rx()252 writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_dma_stop_rx()381 value = readl(ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_set_bfsize()383 writel(value, ioaddr + XGMAC_DMA_CH_RX_CONTROL(chan)); in dwxgmac2_set_bfsize()
169 #define XGMAC_DMA_CH_RX_CONTROL(x) (0x00003108 + (0x80 * (x))) macro