Searched refs:WBCIR_REG_SP3_ASCR (Results 1 – 1 of 1) sorted by relevance
87 #define WBCIR_REG_SP3_ASCR 0x07 /* Aux Status and Control */ macro357 outb(WBCIR_RX_DISABLE, data->sbase + WBCIR_REG_SP3_ASCR); in wbcir_idle_rx()439 outb(WBCIR_TX_UNDERRUN, data->sbase + WBCIR_REG_SP3_ASCR); in wbcir_irq_tx()447 outb(WBCIR_TX_EOT, data->sbase + WBCIR_REG_SP3_ASCR); in wbcir_irq_tx()488 if (inb(data->sbase + WBCIR_REG_SP3_ASCR) & WBCIR_TX_UNDERRUN) in wbcir_irq_handler()988 outb(0xE0, data->sbase + WBCIR_REG_SP3_ASCR); in wbcir_init_hw()
