Searched refs:UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT (Results 1 – 2 of 2) sorted by relevance
205 #define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18) macro1122 value &= ~UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(~0); in clk_pllu_enable()1123 value |= UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(params->active_delay_count); in clk_pllu_enable()1739 value &= ~UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(~0); in clk_pllu_tegra114_enable()1740 value |= UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(params->active_delay_count); in clk_pllu_tegra114_enable()
168 #define UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(x) (((x) & 0x3f) << 18) macro2766 reg &= ~UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(~0); in tegra210_utmi_param_configure()2768 UTMIP_PLL_CFG2_ACTIVE_DLY_COUNT(utmi_parameters[i].active_delay_count); in tegra210_utmi_param_configure()