Searched refs:SPU (Results 1 – 11 of 11) sorted by relevance
1 The Broadcom Secure Processing Unit (SPU) hardware supports symmetric2 cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware7 brcm,spum-crypto - for devices with SPU-M hardware11 brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware13 - reg: Should contain SPU registers location and length.14 - mboxes: The mailbox channel to be used to communicate with the SPU.
6 spufs - the SPU file system10 The SPU file system is used on PowerPC machines that implement the Cell16 can use spu_create(2) to establish SPU contexts in the spufs root.18 Every SPU context is represented by a directory containing a predefined20 logical SPU. Users can change permissions on those files, but not actu-53 the contents of the local storage memory of the SPU. This can be55 data in the address space of the SPU. The possible operations on an61 file. The file size is the size of the local storage of the SPU,66 SPU local storage within the process address space. Only71 The first SPU to CPU communication mailbox. This file is read-only and[all …]
125 - info and mount options for the SPU filesystem used on Cell.
696 SPU -- a spurious interrupt is some interrupt that was raised then lowered
46 tristate "SPU file system"51 The SPU file system is used to access Synergistic Processing96 tristate "CBE frequency scaling based on SPU usage"
896 DMAC1B, DMAC0B, I2C0, I2C1, SDHI0, SDHI1, SPU, MMCIF, enumerator1013 INTC_GROUP(SPU, SPU_SPUI0, SPU_SPUI1),1063 TMU1_TUNI2, SPU } },
7 * SPU - Seat Power Unit
244 /* can the driver also handle SPU, NAVI and CSS encoded data?
691 Secure Processing Unit (SPU). The SPU driver registers ablkcipher,
79 3 processors on chip, Java ones, VPU, SPU, APU, maybe these are the122 - 0x9050: SPU control190 - Write 0x00000001 to register 0x9050 to stop the SPU.200 re-enable the SPU.
13742 SPU FILE SYSTEM
