Searched refs:SOR_LANE_SEQ_CTL_TRIGGER (Results 1 – 2 of 2) sorted by relevance
159 #define SOR_LANE_SEQ_CTL_TRIGGER (1 << 31) macro
1132 value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_UP | in tegra_sor_power_down()1140 if ((value & SOR_LANE_SEQ_CTL_TRIGGER) == 0) in tegra_sor_power_down()1146 if ((value & SOR_LANE_SEQ_CTL_TRIGGER) != 0) in tegra_sor_power_down()1779 value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_DOWN | in tegra_sor_edp_enable()1785 if ((value & SOR_LANE_SEQ_CTL_TRIGGER) == 0) in tegra_sor_edp_enable()2275 value = SOR_LANE_SEQ_CTL_TRIGGER | SOR_LANE_SEQ_CTL_SEQUENCE_DOWN | in tegra_sor_hdmi_enable()2281 if ((value & SOR_LANE_SEQ_CTL_TRIGGER) == 0) in tegra_sor_hdmi_enable()
