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Searched refs:SOR_LANE_SEQ_CTL (Results 1 – 2 of 2) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/tegra/
Dsor.h158 #define SOR_LANE_SEQ_CTL 0x21 macro
Dsor.c1134 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_power_down()
1139 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_power_down()
1264 DEBUGFS_REG32(SOR_LANE_SEQ_CTL),
1781 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_edp_enable()
1784 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_edp_enable()
2268 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable()
2277 tegra_sor_writel(sor, value, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable()
2280 value = tegra_sor_readl(sor, SOR_LANE_SEQ_CTL); in tegra_sor_hdmi_enable()