Searched refs:SMU_SCLK_DPM_STATE_0_CNTL_3 (Results 1 – 2 of 2) sorted by relevance
61 #define SMU_SCLK_DPM_STATE_0_CNTL_3 0x1f00c macro
659 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix); in trinity_set_allos_gnb_slow()662 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value); in trinity_set_allos_gnb_slow()671 value = RREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix); in trinity_set_force_nbp_state()674 WREG32_SMC(SMU_SCLK_DPM_STATE_0_CNTL_3 + ix, value); in trinity_set_force_nbp_state()
