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Searched refs:SDMA0 (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dsdma_v4_0.c61 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CHICKEN_BITS, 0xfe931f07, 0x02831d07),
62 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_CLK_CTRL, 0xff000ff0, 0x3f000100),
63 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_IB_CNTL, 0x800f0100, 0x00000100),
64 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_GFX_RB_WPTR_POLL_CNTL, 0xfffffff7, 0x00403000),
65 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_PAGE_IB_CNTL, 0x800f0100, 0x00000100),
66 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_PAGE_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
67 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_POWER_CNTL, 0x003ff006, 0x0003c000),
68 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_IB_CNTL, 0x800f0100, 0x00000100),
69 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC0_RB_WPTR_POLL_CNTL, 0x0000fff0, 0x00403000),
70 SOC15_REG_GOLDEN_VALUE(SDMA0, 0, mmSDMA0_RLC1_IB_CNTL, 0x800f0100, 0x00000100),
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Dpsp_v10_0.c372 *sram_addr_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_ADDR); in psp_v10_0_sram_map()
373 *sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA); in psp_v10_0_sram_map()
Dpsp_v3_1.c505 *sram_addr_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_ADDR); in psp_v3_1_sram_map()
506 *sram_data_reg_offset = SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_UCODE_DATA); in psp_v3_1_sram_map()
Damdgpu_amdkfd_gfx_v9.c375 SOC15_REG_OFFSET(SDMA0, 0, in get_sdma_base_addr()
543 SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_GFX_CONTEXT_CNTL); in kgd_hqd_sdma_load()
Dsoc15.c277 { SOC15_REG_ENTRY(SDMA0, 0, mmSDMA0_STATUS_REG)},
Dsdma_v2_4.c277 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v2_4_ring_emit_hdp_flush()
Dsdma_v3_0.c452 ref_and_mask = REG_SET_FIELD(ref_and_mask, GPU_HDP_FLUSH_DONE, SDMA0, 1); in sdma_v3_0_ring_emit_hdp_flush()
/Linux-v4.19/drivers/gpu/drm/radeon/
Dcik_sdma.c178 ref_and_mask = SDMA0; in cik_sdma_hdp_flush_ring_emit()
Dcikd.h860 #define SDMA0 (1 << 10) macro