Searched refs:QCA953X_PLL_DDR_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance
388 pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); in qca953x_clocks_init()
356 #define QCA953X_PLL_DDR_CONFIG_REG 0x04 macro
