/Linux-v4.19/drivers/gpu/drm/i915/gvt/ |
D | handlers.c | 632 calc_index(offset, _FDI_RXA_CTL, _FDI_RXB_CTL, 0, FDI_RX_CTL(PIPE_C)) 635 calc_index(offset, _FDI_TXA_CTL, _FDI_TXB_CTL, 0, FDI_TX_CTL(PIPE_C)) 638 calc_index(offset, _FDI_RXA_IMR, _FDI_RXB_IMR, 0, FDI_RX_IMR(PIPE_C)) 746 calc_index(offset, _DSPASURF, _DSPBSURF, 0, DSPSURF(PIPE_C)) 757 [PIPE_C] = PRIMARY_C_FLIP_DONE, in pri_surf_mmio_write() 768 calc_index(offset, _SPRA_SURF, _SPRB_SURF, 0, SPRSURF(PIPE_C)) 778 [PIPE_C] = SPRITE_C_FLIP_DONE, in spr_surf_mmio_write() 1914 MMIO_D(PIPEDSL(PIPE_C), D_ALL); in init_generic_mmio_info() 1919 MMIO_DH(PIPECONF(PIPE_C), D_ALL, NULL, pipeconf_mmio_write); in init_generic_mmio_info() 1924 MMIO_D(PIPESTAT(PIPE_C), D_ALL); in init_generic_mmio_info() [all …]
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D | display.c | 52 pipe = PIPE_C; in get_edp_pipe() 394 [PIPE_C] = PIPE_C_VBLANK, in emulate_vblank_on_pipe() 398 if (pipe < PIPE_A || pipe > PIPE_C) in emulate_vblank_on_pipe()
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D | cmd_parser.c | 1178 [4] = {PIPE_C, PLANE_A, PRIMARY_C_FLIP_DONE}, in gen8_decode_mi_display_flip() 1179 [5] = {PIPE_C, PLANE_B, SPRITE_C_FLIP_DONE}, in gen8_decode_mi_display_flip() 1237 info->pipe = PIPE_C; in skl_decode_mi_display_flip() 1252 info->pipe = PIPE_C; in skl_decode_mi_display_flip()
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D | interrupt.c | 451 DEFINE_GVT_GEN8_INTEL_GVT_IRQ_INFO(de_pipe_c, GEN8_DE_PIPE_ISR(PIPE_C));
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/Linux-v4.19/drivers/gpu/drm/i915/ |
D | intel_device_info.c | 750 info->num_scalers[PIPE_C] = 1; in intel_device_info_runtime_init() 770 info->num_sprites[PIPE_C] = 1; in intel_device_info_runtime_init() 818 disabled_mask |= BIT(PIPE_C); in intel_device_info_runtime_init() 826 case BIT(PIPE_A) | BIT(PIPE_C): in intel_device_info_runtime_init()
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D | intel_pipe_crc.c | 178 case PIPE_C: in vlv_pipe_crc_ctl_reg() 277 case PIPE_C: in vlv_undo_pipe_scramble_reset()
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D | intel_runtime_pm.c | 1249 pipe = PIPE_C; in chv_dpio_cmn_power_well_enable() 1313 assert_pll_disabled(dev_priv, PIPE_C); in chv_dpio_cmn_power_well_disable() 1333 enum pipe pipe = phy == DPIO_PHY0 ? PIPE_A : PIPE_C; in assert_chv_phy_powergate() 2153 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), 2320 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), 2380 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), 2435 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), 2559 .hsw.irq_pipe_mask = BIT(PIPE_B) | BIT(PIPE_C), 2749 .hsw.irq_pipe_mask = BIT(PIPE_C),
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D | intel_atomic.c | 347 } else if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { in intel_atomic_setup_scalers()
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D | intel_pm.c | 495 case PIPE_C: in vlv_get_fifo_size() 1004 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE1], SPRITEF) | in vlv_write_wm_values() 1005 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_SPRITE0], SPRITEE)); in vlv_write_wm_values() 1007 FW_WM_VLV(wm->pipe[PIPE_C].plane[PLANE_PRIMARY], PLANEC) | in vlv_write_wm_values() 1008 FW_WM(wm->pipe[PIPE_C].plane[PLANE_CURSOR], CURSORC)); in vlv_write_wm_values() 1011 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE1] >> 8, SPRITEF_HI) | in vlv_write_wm_values() 1012 FW_WM(wm->pipe[PIPE_C].plane[PLANE_SPRITE0] >> 8, SPRITEE_HI) | in vlv_write_wm_values() 1013 FW_WM(wm->pipe[PIPE_C].plane[PLANE_PRIMARY] >> 8, PLANEC_HI) | in vlv_write_wm_values() 1897 wm_state->cxsr = crtc->pipe != PIPE_C && num_active_planes == 1; in vlv_compute_pipe_wm() 2006 case PIPE_C: in vlv_atomic_update_fifo() [all …]
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D | intel_display.h | 33 PIPE_C, enumerator
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D | i915_trace.h | 90 __entry->frame[PIPE_C], __entry->scanline[PIPE_C])
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D | intel_sprite.c | 1490 return pipe != PIPE_C; in skl_plane_has_ccs() 1492 return pipe != PIPE_C && in skl_plane_has_ccs()
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D | vlv_dsi.c | 1072 if (WARN_ON(tmp > PIPE_C)) in intel_dsi_get_hw_state() 1791 intel_encoder->crtc_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C); in vlv_dsi_init()
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D | i915_cmd_parser.c | 618 REG32(GEN7_PIPE_DE_LOAD_SL(PIPE_C)),
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D | intel_ddi.c | 1782 case PIPE_C: in intel_ddi_enable_transcoder_func() 1957 *pipe = PIPE_C; in intel_ddi_get_hw_state()
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D | intel_display.c | 4569 WARN_ON(I915_READ(FDI_RX_CTL(PIPE_C)) & FDI_RX_ENABLE); in cpt_set_fdi_bc_bifurcation() 4594 case PIPE_C: in ivybridge_update_fdi_bc_bifurcation() 6407 other_crtc = intel_get_crtc_for_pipe(dev_priv, PIPE_C); in ironlake_check_fdi_lanes() 6419 case PIPE_C: in ironlake_check_fdi_lanes() 7326 (pipe == PIPE_B || pipe == PIPE_C)) in intel_set_pipe_timings() 9376 trans_edp_pipe = PIPE_C; in hsw_get_transcoder_state() 9930 if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_C && in i9xx_check_cursor() 13628 else if ((INTEL_GEN(dev_priv) == 9 && pipe == PIPE_C) && in skl_plane_has_planar() 13638 if (plane_id != PLANE_SPRITE0 || pipe == PIPE_C || in skl_plane_has_planar()
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D | intel_drv.h | 1224 case PIPE_C: in vlv_pipe_to_channel()
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D | i915_irq.c | 1911 case PIPE_C: in i9xx_pipestat_irq_ack()
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