Searched refs:MI_SEMAPHORE_SYNC_VER (Results 1 – 2 of 2) sorted by relevance
83 #define MI_SEMAPHORE_SYNC_VER (1<<16) /* RCS wait for VECS (RVESYNC) */ macro
2100 [RCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VER, .mbox_reg = GEN6_RVESYNC }, in intel_ring_init_semaphores()
