Searched refs:MI_SEMAPHORE_SYNC_VEB (Results 1 – 2 of 2) sorted by relevance
89 #define MI_SEMAPHORE_SYNC_VEB (1<<16) /* BCS wait for VECS (BVESYNC) */ macro
2102 [BCS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VEB, .mbox_reg = GEN6_BVESYNC }, in intel_ring_init_semaphores()
