Searched refs:IMX6SL_CLK_PLL4_POST_DIV (Results 1 – 2 of 2) sorted by relevance
27 #define IMX6SL_CLK_PLL4_POST_DIV 14 macro
266 …clks[IMX6SL_CLK_PLL4_POST_DIV] = clk_register_divider_table(NULL, "pll4_post_div", "pll4_audio",… in imx6sl_clocks_init()
