Searched refs:I915_READ16 (Results 1 – 7 of 7) sorted by relevance
689 if (I915_READ16(C0DRB3) == I915_READ16(C1DRB3)) { in i915_gem_detect_bit_6_swizzle()
187 u16 val = I915_READ16(reg); in gen2_assert_iir_is_zero()4367 *eir = I915_READ16(EIR); in i8xx_error_irq_ack()4372 *eir_stuck = I915_READ16(EIR); in i8xx_error_irq_ack()4386 emr = I915_READ16(EMR); in i8xx_error_irq_ack()4454 iir = I915_READ16(IIR); in i8xx_irq_handler()
1068 u16 rgvswctl = I915_READ16(MEMSWCTL); in i915_frequency_info()1069 u16 rgvstat = I915_READ16(MEMSTAT_ILK); in i915_frequency_info()1429 crstandvid = I915_READ16(CRSTANDVID); in ironlake_drpc_info()2036 I915_READ16(C0DRB3)); in i915_swizzle_info()2038 I915_READ16(C1DRB3)); in i915_swizzle_info()
1697 reg->val = I915_READ16(entry->offset_ldw); in i915_reg_read_ioctl()
1696 error->ier = I915_READ16(IER); in capture_reg_state()
184 ddrpll = I915_READ16(DDRMPLL1); in i915_ironlake_get_mem_freq()185 csipll = I915_READ16(CSIPLL0); in i915_ironlake_get_mem_freq()6127 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_set_drps()6219 rgvswctl = I915_READ16(MEMSWCTL); in ironlake_disable_drps()
3538 #define I915_READ16(reg) dev_priv->uncore.funcs.mmio_readw(dev_priv, (reg), true) macro
