Searched refs:I40E_L4_DST_MASK (Results 1 – 3 of 3) sorted by relevance
2688 if (i_set & I40E_L4_DST_MASK) in i40e_get_rss_hash_opts()2924 if (input_set & I40E_L4_DST_MASK) in i40e_get_ethtool_fdir_entry()3018 i_set |= I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3020 i_set &= ~I40E_L4_DST_MASK; in i40e_get_rss_hash_bits()3651 old_value = !!(old & I40E_L4_DST_MASK); in i40e_print_input_set()3652 new_value = !!(new & I40E_L4_DST_MASK); in i40e_print_input_set()3793 new_mask |= I40E_L4_DST_MASK; in i40e_check_fdir_input_set()3795 new_mask &= ~I40E_L4_DST_MASK; in i40e_check_fdir_input_set()3825 new_mask |= I40E_L4_SRC_MASK | I40E_L4_DST_MASK; in i40e_check_fdir_input_set()3827 new_mask &= ~(I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_check_fdir_input_set()
1476 #define I40E_L4_DST_MASK (0x1ULL << I40E_L4_DST_SHIFT) macro
7746 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()7751 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()7756 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_fdir_filter_exit()8187 I40E_L4_SRC_MASK | I40E_L4_DST_MASK); in i40e_reenable_fdir_atr()
