Searched refs:GEN6_VEVSYNC (Results 1 – 2 of 2) sorted by relevance
2092 [VECS_HW] = { .wait_mbox = MI_SEMAPHORE_SYNC_VVE, .mbox_reg = GEN6_VEVSYNC }, in intel_ring_init_semaphores()
2341 #define GEN6_VEVSYNC (RING_SYNC_2(VEBOX_RING_BASE)) macro
