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Searched refs:EMC_CFG (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/arch/arm/mach-tegra/
Dsleep-tegra30.S29 #define EMC_CFG 0xc macro
452 ldr r1, [r0, #EMC_CFG]
454 str r1, [r0, #EMC_CFG]
521 ldr r1, [r5, #0x0] @ restore EMC_CFG
522 str r1, [r0, #EMC_CFG]
541 .word TEGRA_EMC_BASE + EMC_CFG @0x0
552 .word TEGRA_EMC0_BASE + EMC_CFG @0x0
560 .word TEGRA_EMC1_BASE + EMC_CFG @0x20
568 .word TEGRA124_EMC_BASE + EMC_CFG @0x0
756 ldr r1, [r0, #EMC_CFG]
[all …]
Dsleep-tegra20.S33 #define EMC_CFG 0xc macro
391 ldr r1, [r0, #EMC_CFG]
393 str r1, [r0, #EMC_CFG]
/Linux-v4.19/drivers/memory/tegra/
Dtegra124-emc.c40 #define EMC_CFG 0xc macro
590 val = readl(emc->regs + EMC_CFG); in tegra_emc_prepare_timing_change()
593 writel(val, emc->regs + EMC_CFG); in tegra_emc_prepare_timing_change()
676 emc_ccfifo_writel(emc, val, EMC_CFG); in tegra_emc_prepare_timing_change()
813 writel(timing->emc_cfg, emc->regs + EMC_CFG); in tegra_emc_complete_timing_change()
859 timing->emc_cfg = readl(emc->regs + EMC_CFG); in emc_read_current_timing()
/Linux-v4.19/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra124-emc.txt30 - nvidia,emc-cfg : EMC_CFG