Searched refs:E5433_DIV_CPU0 (Results 1 – 1 of 1) sorted by relevance
50 #define E5433_DIV_CPU0 0x400 macro272 div0 = readl(base + E5433_DIV_CPU0); in exynos5433_set_safe_div()274 writel(div0, base + E5433_DIV_CPU0); in exynos5433_set_safe_div()328 writel(div0, base + E5433_DIV_CPU0); in exynos5433_cpuclk_pre_rate_change()
